at91rm9200_twi.c

at91rm9200 i2c测试程序 ads调试

// ----------------------------------------------------------------------------
// File Name      : AT91RM9200.c
// Object         : AT91RM9200 / TWI definitions
// Writer         : Liuhuiyong
// Date           :2005-1-26
// ----------------------------------------------------------------------------
#include "AT91RM9200_TWI.H"
//*----------------------------------------------------------------------------
//* \fn    AT91F_TWI_Write
//*----------------------------------------------------------------------------
unsigned int temp;
int AT91F_TWI_Write(int address, char *data2send, int size)
{
	unsigned int status;

	// Set the TWI Master Mode Register
	TWI_MMR =(AT91C_DS1307_I2C_ADDRESS|AT91C_TWI_IADRSZ_1_BYTE) & ~AT91C_TWI_MREAD;	//0xFFFB8004=0x0068000100
	
	// Set TWI Internal Address Register
	TWI_IADR = address;                   

	status = TWI_SR;
		
	TWI_THR=temp= *(data2send++);
	
	
	TWI_CR = AT91C_TWI_START;           //0xFFFB8000=0x00000001
		
	while (size-- >1){

		// Wait THR Holding register to be empty
		while (!(TWI_SR & AT91C_TWI_TXRDY));
	
		// Send first byte
		TWI_THR =temp= *(data2send++);
		
	}

	TWI_CR = AT91C_TWI_STOP;           //0xFFFB8000=0x00000002	

	status = TWI_SR;

	// Wait transfer is finished
    while (!(TWI_SR & AT91C_TWI_TXCOMP));
		
	return AT91C_DS1307_WRITE_OK;
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_TWI_Read
//*----------------------------------------------------------------------------
int AT91F_TWI_Read(int address, char *data, int size)
{
	unsigned int status;
	
	// Set the TWI Master Mode Register
	TWI_MMR =AT91C_DS1307_I2C_ADDRESS|AT91C_TWI_IADRSZ_1_BYTE| AT91C_TWI_MREAD;	//0xFFFB8004=0x0068010100
	
	// Set TWI Internal Address Register
	TWI_IADR = address;
	
	// Start transfer
	TWI_CR = AT91C_TWI_START;     //0xFFFB8000=0x00000001
	
	status = TWI_SR;
		
	while (size-- >1){
		
		// Wait RHR Holding register is full
		while (!(TWI_SR & AT91C_TWI_RXRDY));

		// Read byte
		*(data++) =temp= TWI_RHR;
	
	}
	
	TWI_CR = AT91C_TWI_STOP;          //0xFFFB8000=0x00000002

	status = TWI_SR;

	// Wait transfer is finished
    while (!(TWI_SR & AT91C_TWI_TXCOMP));

	// Read last byte
	*data = temp=TWI_RHR;
		
	return AT91C_DS1307_READ_OK;
}

void AT91F_SetTwiClock()
{
	int sclock;

	//CKDIV = 1 and CHDIV=CLDIV  ==> CLDIV = CHDIV = 1/4*((Fmclk/FTWI) -6)

	sclock = (10*AT91C_MASTER_CLOCK /AT91C_TWI_CLOCK);
	if (sclock % 10 >= 5)
		sclock = (sclock /10) - 5;
	else
		sclock = (sclock /10)- 6;
	sclock = (sclock + (4 - sclock %4)) >> 2;	// div 4

    TWI_CWGR	= 0x00010000 | sclock | (sclock << 8);
}


unsigned char Writebuf[7]={0x10,0x30,0x17,0x03,0x02,0x02,0x05};  //05-02-02 17:16:10 Thursday
unsigned char Readbuf[7];
int main()
{
     int loop;

	//Enable the PLLA Clock
	CKGR_PLLAR=AT91C_PMC_PLLA;  //0xFFFFFC28=0x000C4F04
	
	//Assigns the TWD and the TWCK line to the Peripheral A function.
    PIO_ASR=AT91C_PIO_TWD|AT91C_PIO_TWCK;  //0xFFFFF470=0x06000000
    PIO_BSR=0;                             //0xFFFFF474=0
    
	//Disable PIO from controlling the TWD and the TWCK line
	PIO_PDR=AT91C_PIO_DTWD|AT91C_PIO_DTWCK|0; //0xFFFFF404=0x06000000
	
	//Enables Multi Drive on the TWD and the TWCK line
    PIO_MDER=AT91C_PIO_MTWD;                //0xFFFFF450=0x02000000
    PIO_MDDR=~(AT91C_PIO_MTWD);             //0xFFFFF454=0xFDFFFFFF
        
	//Enable TWI Clock 
	PMC_PCER=AT91C_PMC_TWI;                //0xFFFFFC10=0x00001000
	
	//Disable interrupts
	TWI_IDR =(unsigned int) -1;            //0xFFFB8028=0xFFFFFFFF
	
   //Reset peripheral
	TWI_CR = AT91C_TWI_SWRST;              //0xFFFB8000=0x00000080
	
   //enable the master transfer
	TWI_CR=AT91C_TWI_MSEN;                 //0xFFFB8000=0x00000004
	
    // Set TWI Clock Waveform Generator Register	
	AT91F_SetTwiClock();
	
	//Set The Date And The Time
    AT91F_TWI_Write(0x0,(char*)&Writebuf,7);
    
    // Wait 10 ms before data is written into ds1307
    for (loop=0; loop<1000000; loop++);
    
    //Read Out The Date And The Time
	AT91F_TWI_Read(0x0,(char*)&Readbuf, 7);
	
}