ad.map.rpt

FPGA控制串行AD（AD0804）

+------------------------+-------------+-------------------------------------+
; Parameter Name         ; Value       ; Type                                ;
+------------------------+-------------+-------------------------------------+
; LPM_WIDTH              ; 14          ; Untyped                             ;
; LPM_REPRESENTATION     ; UNSIGNED    ; Untyped                             ;
; LPM_DIRECTION          ; ADD         ; Untyped                             ;
; ONE_INPUT_IS_CONSTANT  ; YES         ; Untyped                             ;
; LPM_PIPELINE           ; 0           ; Untyped                             ;
; MAXIMIZE_SPEED         ; 5           ; Untyped                             ;
; REGISTERED_AT_END      ; 0           ; Untyped                             ;
; OPTIMIZE_FOR_SPEED     ; 1           ; Untyped                             ;
; USE_CS_BUFFERS         ; 1           ; Untyped                             ;
; CARRY_CHAIN            ; MANUAL      ; Untyped                             ;
; CARRY_CHAIN_LENGTH     ; 48          ; CARRY_CHAIN_LENGTH                  ;
; DEVICE_FAMILY          ; ACEX1K      ; Untyped                             ;
; USE_WYS                ; OFF         ; Untyped                             ;
; STYLE                  ; FAST        ; Untyped                             ;
; CBXI_PARAMETER         ; add_sub_5nh ; Untyped                             ;
; AUTO_CARRY_CHAINS      ; ON          ; AUTO_CARRY                          ;
; IGNORE_CARRY_BUFFERS   ; OFF         ; IGNORE_CARRY                        ;
; AUTO_CASCADE_CHAINS    ; ON          ; AUTO_CASCADE                        ;
; IGNORE_CASCADE_BUFFERS ; OFF         ; IGNORE_CASCADE                      ;
+------------------------+-------------+-------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 6.0 Build 178 04/27/2006 SJ Full Version
    Info: Processing started: Wed Nov 07 15:18:32 2007
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off ad -c ad
Info: Found 2 design units, including 1 entities, in source file clk1k.vhd
    Info: Found design unit 1: clk1k-behave
    Info: Found entity 1: clk1k
Info: Found 2 design units, including 1 entities, in source file fenwei.vhd
    Info: Found design unit 1: fenwei-behave
    Info: Found entity 1: fenwei
Info: Found 2 design units, including 1 entities, in source file display.vhd
    Info: Found design unit 1: display-decoder
    Info: Found entity 1: display
Info: Found 2 design units, including 1 entities, in source file ad0804.vhd
    Info: Found design unit 1: ad0804-Behave
    Info: Found entity 1: ad0804
Info: Found 2 design units, including 1 entities, in source file ad.vhd
    Info: Found design unit 1: ad-behave
    Info: Found entity 1: ad
Info: Elaborating entity "ad" for the top level hierarchy
Info: Elaborating entity "clk1k" for hierarchy "clk1k:u1"
Info: Elaborating entity "ad0804" for hierarchy "ad0804:u2"
Info: Elaborating entity "fenwei" for hierarchy "fenwei:u3"
Info: Elaborating entity "display" for hierarchy "display:u4"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/lpm_add_sub.tdf
    Info: Found entity 1: lpm_add_sub
Info: Elaborated megafunction instantiation "clk1k:u1|lpm_add_sub:Add1"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/addcore.tdf
    Info: Found entity 1: addcore
Info: Elaborated megafunction instantiation "clk1k:u1|lpm_add_sub:Add1|addcore:adder", which is child of megafunction instantiation "clk1k:u1|lpm_add_sub:Add1"
Info: Instantiated megafunction "clk1k:u1|lpm_add_sub:Add1" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "5"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/a_csnbuffer.tdf
    Info: Found entity 1: a_csnbuffer
Info: Elaborated megafunction instantiation "clk1k:u1|lpm_add_sub:Add1|addcore:adder|a_csnbuffer:oflow_node", which is child of megafunction instantiation "clk1k:u1|lpm_add_sub:Add1"
Info: Instantiated megafunction "clk1k:u1|lpm_add_sub:Add1" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "5"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Elaborated megafunction instantiation "clk1k:u1|lpm_add_sub:Add1|addcore:adder|a_csnbuffer:result_node", which is child of megafunction instantiation "clk1k:u1|lpm_add_sub:Add1"
Info: Instantiated megafunction "clk1k:u1|lpm_add_sub:Add1" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "5"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/altshift.tdf
    Info: Found entity 1: altshift
Info: Elaborated megafunction instantiation "clk1k:u1|lpm_add_sub:Add1|altshift:result_ext_latency_ffs", which is child of megafunction instantiation "clk1k:u1|lpm_add_sub:Add1"
Info: Instantiated megafunction "clk1k:u1|lpm_add_sub:Add1" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "5"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Elaborated megafunction instantiation "clk1k:u1|lpm_add_sub:Add1|altshift:carry_ext_latency_ffs", which is child of megafunction instantiation "clk1k:u1|lpm_add_sub:Add1"
Info: Instantiated megafunction "clk1k:u1|lpm_add_sub:Add1" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "5"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Elaborated megafunction instantiation "clk1k:u1|lpm_add_sub:Add0"
Info: Elaborated megafunction instantiation "clk1k:u1|lpm_add_sub:Add0|addcore:adder", which is child of megafunction instantiation "clk1k:u1|lpm_add_sub:Add0"
Info: Instantiated megafunction "clk1k:u1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "14"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Elaborated megafunction instantiation "clk1k:u1|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:oflow_node", which is child of megafunction instantiation "clk1k:u1|lpm_add_sub:Add0"
Info: Instantiated megafunction "clk1k:u1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "14"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Elaborated megafunction instantiation "clk1k:u1|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node", which is child of megafunction instantiation "clk1k:u1|lpm_add_sub:Add0"
Info: Instantiated megafunction "clk1k:u1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "14"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Elaborated megafunction instantiation "clk1k:u1|lpm_add_sub:Add0|altshift:result_ext_latency_ffs", which is child of megafunction instantiation "clk1k:u1|lpm_add_sub:Add0"
Info: Instantiated megafunction "clk1k:u1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "14"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: State machine "|ad|ad0804:u2|current_state" contains 4 states
Info: Selected Auto state machine encoding method for state machine "|ad|ad0804:u2|current_state"
Info: Encoding result for state machine "|ad|ad0804:u2|current_state"
    Info: Completed encoding using 4 state bits
        Info: Encoded state bit "ad0804:u2|current_state.read2"
        Info: Encoded state bit "ad0804:u2|current_state.read1"
        Info: Encoded state bit "ad0804:u2|current_state.convert"
        Info: Encoded state bit "ad0804:u2|current_state.start"
    Info: State "|ad|ad0804:u2|current_state.start" uses code string "0000"
    Info: State "|ad|ad0804:u2|current_state.convert" uses code string "0011"
    Info: State "|ad|ad0804:u2|current_state.read1" uses code string "0101"
    Info: State "|ad|ad0804:u2|current_state.read2" uses code string "1001"
Info: Implemented 99 device resources after synthesis - the final resource count might be different
    Info: Implemented 11 input pins
    Info: Implemented 14 output pins
    Info: Implemented 74 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings
    Info: Processing ended: Wed Nov 07 15:18:38 2007
    Info: Elapsed time: 00:00:08