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📄 ad.map.qmsg

📁 FPGA控制串行AD(AD0804)
💻 QMSG
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{ "Info" "ISGN_MEGAFN_PARAM_TOP" "clk1k:u1\|lpm_add_sub:Add1 " "Info: Instantiated megafunction \"clk1k:u1\|lpm_add_sub:Add1\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 5 " "Info: Parameter \"LPM_WIDTH\" = \"5\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "clk1k.vhd" "" { Text "F:/QuartusII work/AD0804/AD/clk1k.vhd" 38 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus60/libraries/megafunctions/altshift.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/altshift.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altshift " "Info: Found entity 1: altshift" {  } { { "altshift.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/altshift.tdf" 28 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "clk1k:u1\|lpm_add_sub:Add1\|altshift:result_ext_latency_ffs clk1k:u1\|lpm_add_sub:Add1 " "Info: Elaborated megafunction instantiation \"clk1k:u1\|lpm_add_sub:Add1\|altshift:result_ext_latency_ffs\", which is child of megafunction instantiation \"clk1k:u1\|lpm_add_sub:Add1\"" {  } { { "lpm_add_sub.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/lpm_add_sub.tdf" 284 2 0 } } { "clk1k.vhd" "" { Text "F:/QuartusII work/AD0804/AD/clk1k.vhd" 38 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "clk1k:u1\|lpm_add_sub:Add1 " "Info: Instantiated megafunction \"clk1k:u1\|lpm_add_sub:Add1\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 5 " "Info: Parameter \"LPM_WIDTH\" = \"5\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "clk1k.vhd" "" { Text "F:/QuartusII work/AD0804/AD/clk1k.vhd" 38 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "clk1k:u1\|lpm_add_sub:Add1\|altshift:carry_ext_latency_ffs clk1k:u1\|lpm_add_sub:Add1 " "Info: Elaborated megafunction instantiation \"clk1k:u1\|lpm_add_sub:Add1\|altshift:carry_ext_latency_ffs\", which is child of megafunction instantiation \"clk1k:u1\|lpm_add_sub:Add1\"" {  } { { "lpm_add_sub.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/lpm_add_sub.tdf" 286 2 0 } } { "clk1k.vhd" "" { Text "F:/QuartusII work/AD0804/AD/clk1k.vhd" 38 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "clk1k:u1\|lpm_add_sub:Add1 " "Info: Instantiated megafunction \"clk1k:u1\|lpm_add_sub:Add1\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 5 " "Info: Parameter \"LPM_WIDTH\" = \"5\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "clk1k.vhd" "" { Text "F:/QuartusII work/AD0804/AD/clk1k.vhd" 38 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "clk1k:u1\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"clk1k:u1\|lpm_add_sub:Add0\"" {  } { { "clk1k.vhd" "" { Text "F:/QuartusII work/AD0804/AD/clk1k.vhd" 25 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "clk1k:u1\|lpm_add_sub:Add0\|addcore:adder clk1k:u1\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"clk1k:u1\|lpm_add_sub:Add0\|addcore:adder\", which is child of megafunction instantiation \"clk1k:u1\|lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/lpm_add_sub.tdf" 266 4 0 } } { "clk1k.vhd" "" { Text "F:/QuartusII work/AD0804/AD/clk1k.vhd" 25 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "clk1k:u1\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"clk1k:u1\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 14 " "Info: Parameter \"LPM_WIDTH\" = \"14\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "clk1k.vhd" "" { Text "F:/QuartusII work/AD0804/AD/clk1k.vhd" 25 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "clk1k:u1\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:oflow_node clk1k:u1\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"clk1k:u1\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:oflow_node\", which is child of megafunction instantiation \"clk1k:u1\|lpm_add_sub:Add0\"" {  } { { "addcore.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/addcore.tdf" 94 2 0 } } { "clk1k.vhd" "" { Text "F:/QuartusII work/AD0804/AD/clk1k.vhd" 25 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "clk1k:u1\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"clk1k:u1\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 14 " "Info: Parameter \"LPM_WIDTH\" = \"14\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "clk1k.vhd" "" { Text "F:/QuartusII work/AD0804/AD/clk1k.vhd" 25 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "clk1k:u1\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node clk1k:u1\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"clk1k:u1\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node\", which is child of megafunction instantiation \"clk1k:u1\|lpm_add_sub:Add0\"" {  } { { "addcore.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/addcore.tdf" 120 6 0 } } { "clk1k.vhd" "" { Text "F:/QuartusII work/AD0804/AD/clk1k.vhd" 25 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "clk1k:u1\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"clk1k:u1\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 14 " "Info: Parameter \"LPM_WIDTH\" = \"14\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "clk1k.vhd" "" { Text "F:/QuartusII work/AD0804/AD/clk1k.vhd" 25 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "clk1k:u1\|lpm_add_sub:Add0\|altshift:result_ext_latency_ffs clk1k:u1\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"clk1k:u1\|lpm_add_sub:Add0\|altshift:result_ext_latency_ffs\", which is child of megafunction instantiation \"clk1k:u1\|lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/lpm_add_sub.tdf" 284 2 0 } } { "clk1k.vhd" "" { Text "F:/QuartusII work/AD0804/AD/clk1k.vhd" 25 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "clk1k:u1\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"clk1k:u1\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 14 " "Info: Parameter \"LPM_WIDTH\" = \"14\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "clk1k.vhd" "" { Text "F:/QuartusII work/AD0804/AD/clk1k.vhd" 25 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT_NO_BITS" "\|ad\|ad0804:u2\|current_state 4 " "Info: State machine \"\|ad\|ad0804:u2\|current_state\" contains 4 states" {  } { { "ad0804.vhd" "" { Text "F:/QuartusII work/AD0804/AD/ad0804.vhd" 46 -1 0 } }  } 0 0 "State machine \"%1!s!\" contains %2!d! states" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|ad\|ad0804:u2\|current_state " "Info: Selected Auto state machine encoding method for state machine \"\|ad\|ad0804:u2\|current_state\"" {  } { { "ad0804.vhd" "" { Text "F:/QuartusII work/AD0804/AD/ad0804.vhd" 46 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|ad\|ad0804:u2\|current_state " "Info: Encoding result for state machine \"\|ad\|ad0804:u2\|current_state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "4 " "Info: Completed encoding using 4 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "ad0804:u2\|current_state.read2 " "Info: Encoded state bit \"ad0804:u2\|current_state.read2\"" {  } { { "ad0804.vhd" "" { Text "F:/QuartusII work/AD0804/AD/ad0804.vhd" 53 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "ad0804:u2\|current_state.read1 " "Info: Encoded state bit \"ad0804:u2\|current_state.read1\"" {  } { { "ad0804.vhd" "" { Text "F:/QuartusII work/AD0804/AD/ad0804.vhd" 53 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "ad0804:u2\|current_state.convert " "Info: Encoded state bit \"ad0804:u2\|current_state.convert\"" {  } { { "ad0804.vhd" "" { Text "F:/QuartusII work/AD0804/AD/ad0804.vhd" 53 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "ad0804:u2\|current_state.start " "Info: Encoded state bit \"ad0804:u2\|current_state.start\"" {  } { { "ad0804.vhd" "" { Text "F:/QuartusII work/AD0804/AD/ad0804.vhd" 53 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ad\|ad0804:u2\|current_state.start 0000 " "Info: State \"\|ad\|ad0804:u2\|current_state.start\" uses code string \"0000\"" {  } { { "ad0804.vhd" "" { Text "F:/QuartusII work/AD0804/AD/ad0804.vhd" 53 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ad\|ad0804:u2\|current_state.convert 0011 " "Info: State \"\|ad\|ad0804:u2\|current_state.convert\" uses code string \"0011\"" {  } { { "ad0804.vhd" "" { Text "F:/QuartusII work/AD0804/AD/ad0804.vhd" 53 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ad\|ad0804:u2\|current_state.read1 0101 " "Info: State \"\|ad\|ad0804:u2\|current_state.read1\" uses code string \"0101\"" {  } { { "ad0804.vhd" "" { Text "F:/QuartusII work/AD0804/AD/ad0804.vhd" 53 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ad\|ad0804:u2\|current_state.read2 1001 " "Info: State \"\|ad\|ad0804:u2\|current_state.read2\" uses code string \"1001\"" {  } { { "ad0804.vhd" "" { Text "F:/QuartusII work/AD0804/AD/ad0804.vhd" 53 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0}  } { { "ad0804.vhd" "" { Text "F:/QuartusII work/AD0804/AD/ad0804.vhd" 46 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "99 " "Info: Implemented 99 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "11 " "Info: Implemented 11 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0} { "Info" "ISCL_SCL_TM_OPINS" "14 " "Info: Implemented 14 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0} { "Info" "ISCL_SCL_TM_LCELLS" "74 " "Info: Implemented 74 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 0 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Wed Nov 07 15:18:38 2007 " "Info: Processing ended: Wed Nov 07 15:18:38 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:08 " "Info: Elapsed time: 00:00:08" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}

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