ad.map.summary

FPGA控制串行AD（AD0804）

Analysis & Synthesis Status : Successful - Wed Nov 07 15:18:38 2007
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : ad
Top-level Entity Name : ad
Family : ACEX1K
Total logic elements : 74
Total pins : 25
Total memory bits : 0
Total PLLs : 0