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ARM Macro Assembler Page 1
1 00000000 ;*******************************************************
*******************************************
2 00000000 ;**File Name: Startup.s
3 00000000 ;**Function: lpc21xx Start-up code
4 00000000
5 00000000 ;*******************************************************
*******************************************
6 00000000
7 00000000 ;Assign space For stack
8 00000000 00000000
SVC_STACK_LEGTH
EQU 0
9 00000000 00000000
FIQ_STACK_LEGTH
EQU 0
10 00000000 00000100
IRQ_STACK_LEGTH
EQU 256
11 00000000 00000000
ABT_STACK_LEGTH
EQU 0
12 00000000 00000000
UND_STACK_LEGTH
EQU 0
13 00000000
14 00000000 E002C014
PINSEL2 EQU 0xE002C014 ; the address of PINSEL2
15 00000000
16 00000000
17 00000000 ;Declare Extern function And varible
18 00000000 IMPORT FIQ_Exception
19 00000000 IMPORT __main
20 00000000 IMPORT TargetResetInit
21 00000000 IMPORT StackUsr
22 00000000 IMPORT bottom_of_heap
23 00000000
24 00000000 ;Declare inside function And varible
25 00000000 EXPORT Reset
26 00000000 EXPORT __rt_div0
27 00000000 EXPORT __user_initial_stackheap
28 00000000
29 00000000 CODE32
30 00000000
31 00000000 AREA vectors,CODE,READONLY
32 00000000 ENTRY
33 00000000 ;Interrupt Vectors
34 00000000 Reset
35 00000000 E59FF018 LDR PC, ResetAddr
36 00000004 E59FF018 LDR PC, UndefinedAddr
37 00000008 E59FF018 LDR PC, SWI_Addr
38 0000000C E59FF018 LDR PC, PrefetchAddr
39 00000010 E59FF018 LDR PC, DataAbortAddr
40 00000014 B9205F80 DCD 0xb9205f80
41 00000018 E51FFFF0 LDR PC, [PC, #-0xff0]
42 0000001C E59FF018 LDR PC, FIQ_Addr
43 00000020
44 00000020 00000000
ResetAddr
DCD ResetInit
ARM Macro Assembler Page 2
45 00000024 00000000
UndefinedAddr
DCD Undefined
46 00000028 00000000
SWI_Addr
DCD SoftwareInterrupt
47 0000002C 00000000
PrefetchAddr
DCD PrefetchAbort
48 00000030 00000000
DataAbortAddr
DCD DataAbort
49 00000034 00000000
Nouse DCD 0
50 00000038 00000000
IRQ_Addr
DCD 0
51 0000003C 00000000
FIQ_Addr
DCD FIQ_Handler
52 00000040
53 00000040
54 00000040 Undefined
55 00000040 EAFFFFFE B Undefined
56 00000044
57 00000044
58 00000044 SoftwareInterrupt
59 00000044 EAFFFFFE B SoftwareInterrupt
60 00000048
61 00000048
62 00000048 PrefetchAbort
63 00000048 EAFFFFFE B PrefetchAbort
64 0000004C
65 0000004C
66 0000004C DataAbort
67 0000004C EAFFFFFE B DataAbort
68 00000050
69 00000050
70 00000050 FIQ_Handler
71 00000050 E92D400F STMFD SP!, {R0-R3, LR}
72 00000054 EBFFFFFE BL FIQ_Exception
73 00000058 E8BD400F LDMFD SP!, {R0-R3, LR}
74 0000005C E25EF004 SUBS PC, LR, #4
75 00000060
76 00000060
77 00000060
78 00000060 ;Encrypt Function
79 00000060
80 00000060 IF :DEF: EN_CRP
90 ENDIF
91 00000060
92 00000060
93 00000060
94 00000060
95 00000060 ;*******************************************************
******************************************
96 00000060 ;** File Name: ResetInit
97 00000060 ;** Function: Entry For Reset
98 00000060 ;*******************************************************
ARM Macro Assembler Page 3
*****************************************
99 00000060 ResetInit
100 00000060
101 00000060 E59F0068 LDR R0, =PINSEL2
102 00000064 IF :DEF: EN_CRP
105 00000064 E3A01034 LDR R1, =0x00000034 ;Not encrypt flash, enab
le JTAG, P1.26-31 used as JT
AG
106 00000068 ENDIF
107 00000068 E5801000 STR R1, [R0]
108 0000006C
109 0000006C
110 0000006C
111 0000006C EBFFFFFE BL InitStack
112 00000070 EBFFFFFE BL TargetResetInit
113 00000074 EAFFFFFE B __main ;to user code entry
114 00000078
115 00000078
116 00000078 ;*******************************************************
******************************************
117 00000078 ;** File Name: __user_initial_stackheap
118 00000078 ;** Function: Initial heap
119 00000078 ;*******************************************************
****************************************
120 00000078 __user_initial_stackheap
121 00000078 E59F0054 LDR r0,=bottom_of_heap
122 0000007C E1A0F00E MOV pc,lr
123 00000080
124 00000080
125 00000080 ;*******************************************************
*****************************************
126 00000080 ;** File Name: __rt_div0
127 00000080 ;** Function: replace original __rt_div0, reduce code s
ize
128 00000080 ;*******************************************************
*****************************************
129 00000080 __rt_div0
130 00000080
131 00000080 EAFFFFFE B __rt_div0
132 00000084
133 00000084
134 00000084 ;*******************************************************
******************************************
135 00000084 ;** File Name: InitStack
136 00000084 ;** Function: Initial Stack
137 00000084 ;*******************************************************
*******************************************
138 00000084 InitStack
139 00000084 E1A0000E MOV R0, LR
140 00000088
141 00000088 ;Svc stack
142 00000088 E321F0D3 MSR CPSR_c, #0xd3
143 0000008C E59FD028 LDR SP, StackSvc
144 00000090 ;Irq stack
145 00000090 E321F0D2 MSR CPSR_c, #0xd2
146 00000094 E59FD024 LDR SP, StackIrq
147 00000098 ;Fiq stack
148 00000098 E321F0D1 MSR CPSR_c, #0xd1
149 0000009C E59FD020 LDR SP, StackFiq
ARM Macro Assembler Page 4
150 000000A0 ;Abt stack
151 000000A0 E321F0D7 MSR CPSR_c, #0xd7
152 000000A4 E59FD01C LDR SP, StackAbt
153 000000A8 ;Undefine stack
154 000000A8 E321F0DB MSR CPSR_c, #0xdb
155 000000AC E59FD018 LDR SP, StackUnd
156 000000B0 ;System stack
157 000000B0 E321F05F MSR CPSR_c, #0x5f ;enable interrupt by CLR C
PSR_I. Dis int, use #0xdf
158 000000B4 E59FD01C LDR SP, =StackUsr
159 000000B8
160 000000B8 E1A0F000 MOV PC, R0
161 000000BC
162 000000BC
163 000000BC FFFFFFFC
StackSvc
DCD SvcStackSpace + (SVC_STACK_LEGTH - 1)* 4
164 000000C0 000003FC
StackIrq
DCD IrqStackSpace + (IRQ_STACK_LEGTH - 1)* 4
165 000000C4 FFFFFFFC
StackFiq
DCD FiqStackSpace + (FIQ_STACK_LEGTH - 1)* 4
166 000000C8 FFFFFFFC
StackAbt
DCD AbtStackSpace + (ABT_STACK_LEGTH - 1)* 4
167 000000CC FFFFFFFC
StackUnd
DCD UndtStackSpace + (UND_STACK_LEGTH - 1)*
4
168 000000D0
169 000000D0 ;/* Assign space For stack */
170 000000D0 E002C014
00000000
00000000 AREA MyStacks, DATA, NOINIT, ALIGN=2
171 00000000 SvcStackSpace
SPACE SVC_STACK_LEGTH * 4
172 00000000 IrqStackSpace
SPACE IRQ_STACK_LEGTH * 4
173 00000400 FiqStackSpace
SPACE FIQ_STACK_LEGTH * 4
174 00000400 AbtStackSpace
SPACE ABT_STACK_LEGTH * 4
175 00000400 UndtStackSpace
SPACE UND_STACK_LEGTH * 4
176 00000400
177 00000400
178 00000400
179 00000400 END
Command Line: [C:\Program Files\ARM\ADSV1_2\BIN\ArmAsm -via .\debug_in_ram\star
tup._ia]
ARM Macro Assembler Page 1 Alphabetic symbol ordering
Relocatable symbols
DataAbort 0000004C
Symbol: DataAbort
Definitions
At line 66 in file src\Startup.s
Uses
At line 48 in file src\Startup.s
At line 67 in file src\Startup.s
DataAbortAddr 00000030
Symbol: DataAbortAddr
Definitions
At line 48 in file src\Startup.s
Uses
At line 39 in file src\Startup.s
Comment: DataAbortAddr used once
FIQ_Addr 0000003C
Symbol: FIQ_Addr
Definitions
At line 51 in file src\Startup.s
Uses
At line 42 in file src\Startup.s
Comment: FIQ_Addr used once
FIQ_Handler 00000050
Symbol: FIQ_Handler
Definitions
At line 70 in file src\Startup.s
Uses
At line 51 in file src\Startup.s
Comment: FIQ_Handler used once
IRQ_Addr 00000038
Symbol: IRQ_Addr
Definitions
At line 50 in file src\Startup.s
Uses
None
Comment: IRQ_Addr unused
InitStack 00000084
Symbol: InitStack
Definitions
At line 138 in file src\Startup.s
Uses
At line 111 in file src\Startup.s
Comment: InitStack used once
Nouse 00000034
Symbol: Nouse
Definitions
At line 49 in file src\Startup.s
Uses
None
Comment: Nouse unused
PrefetchAbort 00000048
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