pc2fpga.map.rpt

this is a sample about usb out transmission

; db/cntr_mo8.tdf                  ; yes             ; Auto-Generated Megafunction  ; D:/RedLogic/RCII_samples/USB_OUT/Proj/db/cntr_mo8.tdf                  ;
; db/cntr_e29.tdf                  ; yes             ; Auto-Generated Megafunction  ; D:/RedLogic/RCII_samples/USB_OUT/Proj/db/cntr_e29.tdf                  ;
; lpm_compare.tdf                  ; yes             ; Megafunction                 ; c:/altera/quartus50/libraries/megafunctions/lpm_compare.tdf            ;
; comptree.inc                     ; yes             ; Other                        ; c:/altera/quartus50/libraries/megafunctions/comptree.inc               ;
; altshift.inc                     ; yes             ; Other                        ; c:/altera/quartus50/libraries/megafunctions/altshift.inc               ;
; comptree.tdf                     ; yes             ; Megafunction                 ; c:/altera/quartus50/libraries/megafunctions/comptree.tdf               ;
; cmpchain.inc                     ; yes             ; Other                        ; c:/altera/quartus50/libraries/megafunctions/cmpchain.inc               ;
; cmpchain.tdf                     ; yes             ; Megafunction                 ; c:/altera/quartus50/libraries/megafunctions/cmpchain.tdf               ;
; altshift.tdf                     ; yes             ; Megafunction                 ; c:/altera/quartus50/libraries/megafunctions/altshift.tdf               ;
; sld_acquisition_buffer.vhd       ; yes             ; Encrypted Megafunction       ; c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd ;
; db/cntr_nt9.tdf                  ; yes             ; Auto-Generated Megafunction  ; D:/RedLogic/RCII_samples/USB_OUT/Proj/db/cntr_nt9.tdf                  ;
; lpm_ff.tdf                       ; yes             ; Megafunction                 ; c:/altera/quartus50/libraries/megafunctions/lpm_ff.tdf                 ;
; altsyncram.tdf                   ; yes             ; Megafunction                 ; c:/altera/quartus50/libraries/megafunctions/altsyncram.tdf             ;
; stratix_ram_block.inc            ; yes             ; Other                        ; c:/altera/quartus50/libraries/megafunctions/stratix_ram_block.inc      ;
; lpm_mux.inc                      ; yes             ; Other                        ; c:/altera/quartus50/libraries/megafunctions/lpm_mux.inc                ;
; altsyncram.inc                   ; yes             ; Other                        ; c:/altera/quartus50/libraries/megafunctions/altsyncram.inc             ;
; a_rdenreg.inc                    ; yes             ; Other                        ; c:/altera/quartus50/libraries/megafunctions/a_rdenreg.inc              ;
; altrom.inc                       ; yes             ; Other                        ; c:/altera/quartus50/libraries/megafunctions/altrom.inc                 ;
; altram.inc                       ; yes             ; Other                        ; c:/altera/quartus50/libraries/megafunctions/altram.inc                 ;
; altdpram.inc                     ; yes             ; Other                        ; c:/altera/quartus50/libraries/megafunctions/altdpram.inc               ;
; altqpram.inc                     ; yes             ; Other                        ; c:/altera/quartus50/libraries/megafunctions/altqpram.inc               ;
; db/altsyncram_th92.tdf           ; yes             ; Auto-Generated Megafunction  ; D:/RedLogic/RCII_samples/USB_OUT/Proj/db/altsyncram_th92.tdf           ;
; db/cntr_bv7.tdf                  ; yes             ; Auto-Generated Megafunction  ; D:/RedLogic/RCII_samples/USB_OUT/Proj/db/cntr_bv7.tdf                  ;
; db/cntr_dn7.tdf                  ; yes             ; Auto-Generated Megafunction  ; D:/RedLogic/RCII_samples/USB_OUT/Proj/db/cntr_dn7.tdf                  ;
; sld_rom_sr.vhd                   ; yes             ; Encrypted Megafunction       ; c:/altera/quartus50/libraries/megafunctions/sld_rom_sr.vhd             ;
; sld_hub.vhd                      ; yes             ; Encrypted Megafunction       ; c:/altera/quartus50/libraries/megafunctions/sld_hub.vhd                ;
; lpm_decode.tdf                   ; yes             ; Megafunction                 ; c:/altera/quartus50/libraries/megafunctions/lpm_decode.tdf             ;
; declut.inc                       ; yes             ; Other                        ; c:/altera/quartus50/libraries/megafunctions/declut.inc                 ;
; db/decode_9ie.tdf                ; yes             ; Auto-Generated Megafunction  ; D:/RedLogic/RCII_samples/USB_OUT/Proj/db/decode_9ie.tdf                ;
; sld_dffex.vhd                    ; yes             ; Encrypted Megafunction       ; c:/altera/quartus50/libraries/megafunctions/sld_dffex.vhd              ;
+----------------------------------+-----------------+------------------------------+------------------------------------------------------------------------+


+--------------------------------------------------------------+
; Analysis & Synthesis Resource Usage Summary                  ;
+-----------------------------------+--------------------------+
; Resource                          ; Usage                    ;
+-----------------------------------+--------------------------+
; Total logic elements              ; 404                      ;
; Total combinational functions     ; 262                      ;
;     -- Total 4-input functions    ; 124                      ;
;     -- Total 3-input functions    ; 53                       ;
;     -- Total 2-input functions    ; 41                       ;
;     -- Total 1-input functions    ; 40                       ;
;     -- Total 0-input functions    ; 4                        ;
; Combinational cells for routing   ; 0                        ;
; Total registers                   ; 298                      ;
; Total logic cells in carry chains ; 51                       ;
; I/O pins                          ; 15                       ;
; Total memory bits                 ; 14336                    ;
; Maximum fan-out node              ; altera_internal_jtag~TDO ;
; Maximum fan-out                   ; 209                      ;
; Total fan-out                     ; 2011                     ;
; Average fan-out                   ; 4.59                     ;
+-----------------------------------+--------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                         ;
+---------------------------------------------------------------------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Compilation Hierarchy Node                                                                        ; Logic Cells ; LC Registers ; Memory Bits ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Carry Chain LCs ; Full Hierarchy Name                                                                                                                                                                                                                                                                                            ;
+---------------------------------------------------------------------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; |pc2fpga                                                                                          ; 404 (5)     ; 298          ; 14336       ; 15   ; 0            ; 106 (1)      ; 142 (1)           ; 156 (3)          ; 51 (0)          ; |pc2fpga                                                                                                                                                                                                                                                                                                       ;
;    |sld_hub:sld_hub_inst|                                                                         ; 116 (35)    ; 71           ; 0           ; 0    ; 0            ; 45 (29)      ; 24 (1)            ; 47 (5)           ; 5 (0)           ; |pc2fpga|sld_hub:sld_hub_inst                                                                                                                                                                                                                                                                                  ;
;       |lpm_decode:instruction_decoder|                                                            ; 5 (0)       ; 5            ; 0           ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 5 (0)            ; 0 (0)           ; |pc2fpga|sld_hub:sld_hub_inst|lpm_decode:instruction_decoder                                                                                                                                                                                                                                                   ;
;          |decode_9ie:auto_generated|                                                              ; 5 (5)       ; 5            ; 0           ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 5 (5)            ; 0 (0)           ; |pc2fpga|sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_9ie:auto_generated                                                                                                                                                                                                                         ;
;       |lpm_shiftreg:jtag_ir_register|                                                             ; 10 (10)     ; 10           ; 0           ; 0    ; 0            ; 0 (0)        ; 10 (10)           ; 0 (0)            ; 0 (0)           ; |pc2fpga|sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register                                                                                                                                                                                                                                                    ;
;       |sld_dffex:BROADCAST|                                                                       ; 1 (1)       ; 1            ; 0           ; 0    ; 0            ; 0 (0)        ; 1 (1)             ; 0 (0)            ; 0 (0)           ; |pc2fpga|sld_hub:sld_hub_inst|sld_dffex:BROADCAST                                                                                                                                                                                                                                                              ;
;       |sld_dffex:IRF_ENA_0|                                                                       ; 1 (1)       ; 1            ; 0           ; 0    ; 0            ; 0 (0)        ; 1 (1)             ; 0 (0)            ; 0 (0)           ; |pc2fpga|sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0                                                                                                                                                                                                                                                              ;
;       |sld_dffex:IRF_ENA|                                                                         ; 1 (1)       ; 1            ; 0           ; 0    ; 0            ; 0 (0)        ; 1 (1)             ; 0 (0)            ; 0 (0)           ; |pc2fpga|sld_hub:sld_hub_inst|sld_dffex:IRF_ENA                                                                                                                                                                                                                                                                ;
;       |sld_dffex:IRSR|                                                                            ; 10 (10)     ; 8            ; 0           ; 0    ; 0            ; 2 (2)        ; 1 (1)             ; 7 (7)            ; 0 (0)           ; |pc2fpga|sld_hub:sld_hub_inst|sld_dffex:IRSR                                                                                                                                                                                                                                                                   ;