📄 tinyplc.h
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/*
* Released under the GNU GPL. See http://www.gnu.org/licenses/gpl.txt
*
* This program is part of TinyPLC
*
* TinyPLC is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundatation; version 2 of the License.
*
* TinyPLC is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*/
/*
* My thanks to my employer, Athena Controls (www.athenacontrols.com)
* for allowing me to open source this project.
*/
/*
* TinyPLC kernel
* Processor: Atmel MEGA1281 or Atmel MEGA2561
* Compiler: Codevision AVR C compiler, 1.24.8e
*
* TinyPLC editor/compiler
* Processor: PC-clone, VESA video (mode 0x105, 1024x768x256)
* Compiler: DeSmet C, version 2.51 (PCC version 1.2)
*
* Revision history:
* Programmer Date Comments
* ---------------- --------- ---------------------------------------------
* William Couture 3/19/2006 Original code
* William Couture 9/13/2006 Modify for GPL release
*/
#ifndef TINYPLC_H_
#define TINYPLC_H_
// #define ENABLE_JTAG /* reserve pins for JTAG debugging */
#define POSITIVE_INPUT_LOGIC /* an "ON" input will be +5V at the input pin */
#define POSITIVE_OUTPUT_LOGIC /* an "ON" output will be +5V at the output pin */
#define XTAL 14745600L
#define HEARTBEAT_FREQUENCY 1000 /* 1ms */
#define MS_PER_TICK (1000 / HEARTBEAT_FREQUENCY)
#define REGISTER register /* not blank, allocate vars to register storage */
#define WDTCSR_UNLOCK 0b00011000
/* ...1.... WDCE
* ....1... WDE
*/
#define WDTCSR_SET_WDT_PERIOD 0b00001111
/* 0....... WDIF
* .0...... WDIE OFF, we're in RESET mode
* ..0..111 WDP3..WDP0 = 2 second reset
* ...0.... WDCE OFF for setting watchdog params
* ....1... WDE ON
*/
#define OCxA_DISCONNECTED 0b00000000
/* 00...... OCxA disconnected */
#define OCxB_DISCONNECTED 0b00000000
/* ..00.... OCxB disconnected */
#define TMR_CLOCK_NONE 0b00000000
/* .....000 no clock, timer/counter stopped */
#define TMR_CLOCK_FOSC 0b00000001
/* .....001 Fosc with no prescalar */
#define TMR_CLOCK_FOSC_8 0b00000010
/* .....010 Fosc / 8 */
#define TMR_CLOCK_FOSC_64 0b00000011
/* .....011 Fosc / 64 */
#define TMR_CLOCK_FOSC_256 0b00000100
/* .....100 Fosc / 256 */
#define TMR_CLOCK_FOSC_1024 0b00000101
/* .....101 Fosc / 1024 */
#define TMR_CLK_T0_FALLING 0b00000110
/* .....110 exernal clock on T0 pin, falling edge */
#define TMR_CLK_T0_RISING 0b00000111
/* .....111 exernal clock on T0 pin, rising edge */
#define TMR0_CYCLES (XTAL / HEARTBEAT_FREQUENCY)
#if TMR0_CYCLES < 256
#define TMR0_CLOCK TMR_CLOCK_FOSC
#define TMR0_PERIOD (TMR0_CYCLES - 1)
#else
#if TMR0_CYCLES < (256 * 8)
#define TMR0_CLOCK TMR_CLOCK_FOSC_8
#define TMR0_PERIOD (TMR0_CYCLES / 8 - 1)
#else
#if TMR0_CYCLES < (256 * 64)
#define TMR0_CLOCK TMR_CLOCK_FOSC_64
#define TMR0_PERIOD (TMR0_CYCLES / 64 - 1)
#else
#if TMR0_CYCLES < (256 * 256)
#define TMR0_CLOCK TMR_CLOCK_FOSC_256
#define TMR0_PERIOD (TMR0_CYCLES / 256 - 1)
#else
#define TMR0_CLOCK TMR_CLOCK_FOSC_1024
#define TMR0_PERIOD (TMR0_CYCLES / 1024 - 1)
#endif
#endif
#endif
#endif
#define TCCR0A_INIT (OCxA_DISCONNECTED \
| OCxB_DISCONNECTED \
| 0b00000010)
/* ......10 WGM1:WMG0 - CTC (Clear Timer on Compare match) */
#define TCCR0B_INIT TMR0_CLOCK /* this also sets WMG2 bit to 0, high bit of CTC mode */
#define TIMSK0_INIT 0b00000010
/* ......1. OCIE0A timer 0 compare A interrupt */
#ifdef POSITIVE_INPUT_LOGIC
#define INPUT_ON 1
#define INPUT_OFF 0
#else
#define INPUT_ON 0
#define INPUT_OFF 1
#endif
#ifdef POSITIVE_OUTPUT_LOGIC
#define OUTPUT_ON 1
#define OUTPUT_OFF 0
#else
#define OUTPUT_ON 0
#define OUTPUT_OFF 1
#endif
#define PORTA_DIRECTIONS 0b11111111 /* all outputs */
/* A0 == DIG_OUT_0, ... A7 == DIG_OUT_7 */
#ifdef POSITIVE_OUTPUT_LOGIC
#define PORTA_DEFAULT 0b00000000 /* all OFF */
#else
#define PORTA_DEFAULT 0b11111111 /* all OFF */
#endif
#define PORTB_DIRECTIONS 0b11111111 /* all outputs */
/* B0 == DIG_OUT_8, ... B7 == DIG_OUT_15 */
#ifdef POSITIVE_OUTPUT_LOGIC
#define PORTB_DEFAULT 0b00000000 /* all OFF */
#else
#define PORTB_DEFAULT 0b11111111 /* all OFF */
#endif
#define PORTC_DIRECTIONS 0b00000000 /* all inputs */
/* C0 == DIG_IN_0, ... C7 == DIG_IN_7 */
#define PORTC_DEFAULT 0b00000000 /* all inputs, don't care */
#define PORTD_DIRECTIONS 0b00000000 /* all inputs */
/* D0 == DIG_IN_8, ... D7 == DIG_IN_15 */
#define PORTD_DEFAULT 0b00000000 /* all inputs, don't care */
#define PORTE_DIRECTIONS 0b11111110
/* 1....... E7 = OUTPUT DIG_OUT_20
* .1...... E6 = OUTPUT DIG_OUT_19
* ..1..... E5 = OUTPUT DIG_OUT_18
* ...1.... E4 = OUTPUT DIG_OUT_17
* ....1... E3 = OUTPUT DIG_OUT_16
* .....1.. E2 = OUTPUT status LED
* ......1. E1 = OUTPUT TX for 1st UART
* .......0 E0 = INPUT RX for 1st UART
*/
#define STATUS_LED PORTE.2
#ifdef POSITIVE_OUTPUT_LOGIC
#define PORTE_DEFAULT 0b00000010
/* 000000.. E7 .. E2, default OFF
* ......1. E1 TX for 1st UART, default HIGH
* .......0 E0 RX INPUT, don't care
*/
#define STATUS_LED_ON 1
#define STATUS_LED_OFF 0
#else
#define PORTE_DEFAULT 0b11111110
/* 111111.. E7 .. E2, default OFF
* ......1. E1 TX for 1st UART, default HIGH
* .......0 E0 RX INPUT, don't care
*/
#define STATUS_LED_ON 0
#define STATUS_LED_OFF 1
#endif
#ifdef ENABLE_JTAG
#define PORTF_DIRECTIONS 0b11110000
/* 1111.... F7..F4, JTAG support
* ....0... F3 = ADC3
* .....0.. F2 = ADC2
* ......0. F1 = ADC1
* .......0 F0 = ADC0
*/
#define PORTF_DEFAULT 0b00000000
/* 0000.... JTAG support, don't care
* ....0000 analog inputs, don't care
*/
#define TOTAL_ANALOGS 4
#else
#define PORTF_DIRECTIONS 0b00000000 /* all analog inputs */
#define PORTF_DEFAULT 0b00000000 /* analog ports, don't care */
#define TOTAL_ANALOGS 8
#endif
#define PORTG_DIRECTIONS 0b00000000
/* 00...... G7, G6 do not exist
* ..00000 G5 == DIG_IN_20, ... G1 == DIG_IN_16
* .......0 G0 = INPUT (run/stop switch)
*/
#define PORTG_DEFAULT 0b00000000 /* inputs, don't care */
#define RUNSTOP_SWITCH PING.0
#ifdef POSITIVE_INPUT_LOGIC
#define RUNSTOP_RUN 1
#define RUNSTOP_STOP 0
#else
#define RUNSTOP_RUN 0
#define RUNSTOP_STOP 1
#endif
#define DIG_IN_0 PINC.0
#define DIG_IN_1 PINC.1
#define DIG_IN_2 PINC.2
#define DIG_IN_3 PINC.3
#define DIG_IN_4 PINC.4
#define DIG_IN_5 PINC.5
#define DIG_IN_6 PINC.6
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