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📄 plcshare.h

📁 单片PLC,AT2581实现梯形图功能,可作为参考
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/*
 *  Released under the GNU GPL.  See http://www.gnu.org/licenses/gpl.txt
 *
 *  This program is part of TinyPLC
 *
 *  TinyPLC is free software; you can redistribute it and/or modify it
 *  under the terms of the GNU General Public License as published by the
 *  Free Software Foundatation; version 2 of the License.
 *
 *  TinyPLC is distributed in the hope that it will be useful, but WITHOUT
 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 *  for more details.
 */
/*
 *  My thanks to my employer, Athena Controls (www.athenacontrols.com)
 *  for allowing me to open source this project.
 */
/* Shared file between PLC.C for PC and TINYPLC.C for AVR board */
/*
 *  TinyPLC kernel
 *  Processor:   Atmel MEGA1281 or Atmel MEGA2561
 *  Compiler:    Codevision AVR C compiler, 1.24.8e
 *
 *  TinyPLC editor/compiler
 *  Processor:   PC-clone, VESA video (mode 0x105, 1024x768x256)
 *  Compiler:    DeSmet C, version 2.51 (PCC version 1.2)
 *
 *  Revision history:
 *  Programmer        Date       Comments
 *  ----------------  ---------  ---------------------------------------------
 *  William Couture   3/19/2006  Original code
 *  William Couture   9/13/2006  Modify for GPL release
 */

#define NOP           0x00  /* NOP */
#define BRK           0x01  /* STOP execution if debug, else NOP */
#define SETLINETRUE   0x02  /* Set "Line Truth" to TRUE (start of rung) */
#define PUSHLINETRUE  0x03  /* Save "Line Truth" value */
#define ORBRANCH      0x04  /* Pop "Line Truth" value */
#define ORPOPLINETRUE 0x05  /* Pop value and OR to "Line Truth" value */
#define INP           0x06  /* If <reg> is not 0, set rung to TRUE else FALSE */
#define NINP          0x07  /* If <reg> is 0, set rung to TRUE else FALSE */
#define OUT           0x08  /* Set <output> to value of rung */
#define NOUT          0x09  /* Set <outout> to value of !rung */
#define LOUT          0x0a  /* If rung is TRUE set output */
#define UOUT          0x0b  /* If rung is TRUE clear output */
#define ADD           0x0c  /* If rung is TRUE do R1 + R2 --> Dest and set flags */
#define ADDB          0x0d  /* If rung is TRUE do R1 + BVAL --> Dest and set flags */
#define SUB           0x0e  /* If rung is TRUE do R1 - R2 --> Dest and set flags */
#define SUBB          0x0f  /* If rung is TRUE do R1 - BVAL --> Dest and set flags */
#define MUL           0x10  /* If rung is TRUE do R1 * R2 --> Dest and set flags */
#define MULB          0x11  /* If rung is TRUE do R1 * BVAL --> Dest and set flags */
#define DIV           0x12  /* If rung is TRUE
                             *   If R2 is 0, set error flag DIV and set rung to FALSE,
                             *   else do R1 / R2 --> Dest
                             */
#define DIVB          0x13  /* If rung is TRUE
                             *   If R2 is 0, set error flag DIV and set rung to FALSE,
                             *   else do R1 / BVAL --> Dest
                             */
#define MOD           0x14  /*  If rung is TRUE
                             *   If R2 is 0, set error flag DIV and set rung to FALSE,
                             *   else do R1 % R2 --> Dest
                             */
#define MODB          0x15  /*  If rung is TRUE
                             *   If R2 is 0, set error flag DIV and set rung to FALSE,
                             *   else do R1 % BVAL --> Dest
                             */
#define AND           0x16  /* If rung is TRUE do R1 & R2 --> Dest and set flags */
#define ANDB          0x17  /* If rung is TRUE do R1 & BVAL --> Dest and set flags */
#define OR            0x18  /* If rung is TRUE do R1 | R2 --> Dest and set flags */
#define ORB           0x19  /* If rung is TRUE do R1 | BVAL --> Dest and set flags */
#define XOR           0x1a  /* If rung is TRUE do R1 ^ R2 --> Dest and set flags */
#define XORB          0x1b  /* If rung is TRUE do R1 ^ BVAL --> Dest and set flags */
#define NOT           0x1c  /* If rung is TRUE do ~R1 --> R1 and set flags */
#define NEG           0x1d  /* If rung is TRUE do -R1 --> R1 and set flags */
#define EQU           0x1e  /* If R1 == R2 set rung to TRUE else FALSE */
#define EQUB          0x1f  /* If R1 == BVAL set rung to TRUE else FALSE */
#define NEQ           0x20  /* If R1 != R2 set rung to TRUE else FALSE */
#define NEQB          0x21  /* If R1 != BVAL set rung to TRUE else FALSE */
#define GRT           0x22  /* If R1 >  R2 set rung to TRUE else FALSE */
#define GRTB          0x23  /* If R1 >  BVAL set rung to TRUE else FALSE */
#define GEQ           0x24  /* If R1 >= R2 set rung to TRUE else FALSE */
#define GEQB          0x25  /* If R1 >= BVAL set rung to TRUE else FALSE */
#define LES           0x26  /* If R1 <  R2 set rung to TRUE else FALSE */
#define LESB          0x27  /* If R1 <  BVAL set rung to TRUE else FALSE */
#define LEQ           0x28  /* If R1 <= R2 set rung to TRUE else FALSE */
#define LEQB          0x29  /* If R1 <= BVAL set rung to TRUE else FALSE */
#define MOV           0x2a  /* If rung is TRUE move R1 to Dest */
#define MOVD          0x2b  /* If rung is TRUE move DVAL to Dest */
#define JMP           0x2c  /* If rung is TRUE goto Label */
#define OSR           0x2d  /* If previous scan was FALSE and rung is TRUE, output TRUE else FALSE */
#define CTT           0x2e  /* If previous scan was FALSE and rung is TRUE, update counter and flags.  Outputs DONE to rung */
#define CTF           0x30  /* If previous scan was TRUE and rung is FALSE, update counter and flags.  Outputs DONE to rung */
#define TMT           0x32  /* If rung is TRUE update timer and set flags else reset timer.  Outputs DONE to rung */
#define TMF           0x34  /* If rung is FALSE update timer and set flags else reset timer.  Outputs DONE to rung */
#define RTMT          0x36  /* If rung is TRUE update timer and set flags.  Outputs DONE to rung */
#define RTMF          0x38  /* If rung is FALSE update timer and set flags.  Outputs DONE to rung */
#define RESET         0x3a  /* If rung is TRUE reset timer/counter */
#define INVERT        0x3b  /* invert truth of rung */
#define LAST_OPCODE   0x3b  /* don't have to generate opcode for LBL */
#define LBL           0x3c  /* target for JMP */

#define MAX_PROGRAM    1024

#define PLC_MEMORY_LOCS 256

#define STACKSIZE        32

#define FIRST_INPUT       0
#define NUM_INPUTS       32
#define FIRST_VAR        (FIRST_INPUT + NUM_INPUTS)
#define NUM_VARS         32
#define FIRST_TIMER      (FIRST_VAR + NUM_VARS)
#define NUM_TIMERS       16  /* each timer uses 2 dataregs, one for status/accum, one for RTC */
#define FIRST_COUNTER    (FIRST_TIMER + NUM_TIMERS)
#define NUM_COUNTERS     32
#define FIRST_ONESHOT    (FIRST_COUNTER + NUM_COUNTERS)
#define NUM_ONESHOTS     32
#define FIRST_ANALOG     (FIRST_ONESHOT + NUM_ONESHOTS)
#define NUM_ANALOGS      32
#define FIRST_UNUSED     (FIRST_ANALOG + NUM_ANALOGS)
#define NUM_OUTPUTS      32
#define NUM_UNUSED       (PLC_MEMORY_LOCS - NUM_OUTPUTS - FIRST_UNUSED)
#define FIRST_OUTPUT     (FIRST_UNUSED + NUM_UNUSED)

#define STATUSREG (FIRST_VAR + NUM_VARS - 1)  /* last var */
#define STATUS_CY  0x01
#define STATUS_OV  0x02
#define STATUS_ZR  0x04
#define STATUS_NG  0x08
#define STATUS_STK 0x10
#define STATUS_DIV 0x20
#define SIGNBIT    0x80

#define TIMER_FLAGBYTE 0
#define TIMER_ENABLED_BIT 0x01
#define TIMER_ACTIVE_BIT  0x02
#define TIMER_DONE_BIT    0x04

#define MSG_RUN        0
#define MSG_STOP       1
#define MSG_GETREGS    2
#define MSG_NUMSTEPS   3
#define MSG_PROGRAM    4
#define MSG_PROGSTATUS 5
#define MSG_ACK        6
#define LAST_MSG       6

#define MAX_MSG_SIZE  32

#define MSG_STATUS_WAITING  0
#define MSG_STATUS_CMD      1
#define MSG_STATUS_PROGRAM  2
#define MSG_STATUS_IGNORE   3  /* ignore incoming message */

#define MSG_BYTE0  0x55
#define MSG_BYTE1  0xaa

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