uart.cmi

一个UART的FPGA core

[GUI SETTING]
Sort_Type=0
Sort_Direction=1
Skip_Next_Pin=0
Show_Def_Val=1
Show_Msg_Box=1
ACTIVE_SHEET=Clock Attributes
[WINDOWS]
CHILD_FRAME_STATE=Maximal
CHILD_WINDOW_SIZE=1032,748
CHILD_WINDOW_POS=-4,-4
LEFT_PANE_WIDTH=266
TREE_LIST_HEIGHT=631
[Port Attributes]
Type=100,ELLIPSIS
Name=100,ELLIPSIS
Group by=100,ELLIPSIS
Pin=100,ELLIPSIS
Bank=100,ELLIPSIS
IO_TYPE=100,ELLIPSIS
PULLMODE=100,ELLIPSIS
DRIVE=100,ELLIPSIS
SLEWRATE=100,ELLIPSIS
OPENDRAIN=100,ELLIPSIS
Outload=100,ELLIPSIS
[Clock Attributes]
sort_column_1=Selection
Clock Name=100,ELLIPSIS
Selection=100,ELLIPSIS
[Net Attributes]
Type=100,ELLIPSIS
Name=100,ELLIPSIS
Prioritize=100,ELLIPSIS
[Cell Attributes]
Type=100,ELLIPSIS
Name=100,ELLIPSIS
Din/Dout=100,ELLIPSIS
[Global]
Preference Name=100,ELLIPSIS
Preference Value=100,ELLIPSIS
[Block]
Object Type=100,ELLIPSIS
Net/Source=100,ELLIPSIS
Destination=100,ELLIPSIS
[Period/Frequency]
Prf Type=100,ELLIPSIS
Object Type=100,ELLIPSIS
Net/Port=100,ELLIPSIS
Time/Frequency=100,ELLIPSIS
PAR_ADJ=100,ELLIPSIS
[In/Out Clock]
Prf Type=100,ELLIPSIS
Object Type=100,ELLIPSIS
Object Name=100,ELLIPSIS
Clock=100,ELLIPSIS
Delay=100,ELLIPSIS
Time=100,ELLIPSIS
Misc=100,ELLIPSIS
[MultiCycle/MaxDelay]
Prf Type=100,ELLIPSIS
From Type=100,ELLIPSIS
From Object=100,ELLIPSIS
From Clock=100,ELLIPSIS
To Type=100,ELLIPSIS
To Object=100,ELLIPSIS
To Clock=100,ELLIPSIS
Time Spec=100,ELLIPSIS
[Derating]
Preference Name=100,ELLIPSIS
Bank Number=100,ELLIPSIS
Signal Name=100,ELLIPSIS
Preference Value=100,ELLIPSIS