📄 fs4534.patch
字号:
+ FIRST_LINE,
+ MISC_74,
+ SYNC_LVL,
+ VBI_BL_LVL,
+ SOFT_RST,
+ ENC_VER,
+ WSS_CONFIG,
+ WSS_CLK,
+ WSS_DATAF1,
+ WSS_DATAF0,
+ WSS_LNF1,
+ WSS_LNF0,
+ WSS_LVL,
+ MISC_8D,
+ VID_CNTRL0,
+ HD_FP_SYNC,
+ HD_YOFF_BP,
+ SYNC_DL,
+ LD_DET,
+ DAC_CNTL,
+ PWR_MGMT,
+ RED_MTX,
+ GRN_MTX,
+ BLU_MTX,
+ RED_SCL,
+ GRN_SCL,
+ BLU_SCL,
+ CC_F1,
+ CC_F2,
+ CCC,
+ CCBV,
+ CC_BKS,
+ HACT_ST,
+ HACK_WD,
+ VACT_ST,
+ VACT_HT,
+ PR_PB,
+ Y_BW,
+ QPR,
+ UNDEFINED_REGISTER
+} FOCUS_REGISTER_ID;
+
+typedef struct
+{
+ FOCUS_REGISTER_ID id;
+ char* description;
+ uint8 address;
+ uint8 size;
+} FOCUS_REGISTER;
+
+static const FOCUS_REGISTER focus_registers[] =
+{
+ {IHO, "IHO", 0x00, 2},
+ {IVO, "IVO", 0x02, 2},
+ {IHW, "IHW", 0x04, 2},
+ {VSC, "VSC", 0x06, 2},
+ {HSC, "HSC", 0x08, 2},
+ {BYPASS, "Bypass", 0x0A, 2},
+ {CR, "CR", 0x0C, 2},
+ {MISC, "MISC", 0x0E, 2},
+ {NCON, "NCON", 0x10, 4},
+ {NCOD, "NCOD", 0x14, 4},
+ {PLL_M, "PLL M", 0x18, 2},
+ {PLL_N, "PLL N", 0x1A, 2},
+ {PLL_PD, "PLL PD", 0x1C, 2},
+ {SHP, "SHP", 0x24, 2},
+ {FLK, "FLK", 0x26, 2},
+ {GPIO, "GPIO", 0x28, 2},
+ {ID, "ID", 0x32, 2},
+ {STATUS_PORT, "Status Port", 0x34, 2},
+ {FIFO_SP, "FIFO_SP", 0x36, 2},
+ {FIFO_LAT, "FIFO_LAT", 0x38, 2},
+ {VSOUT_TOTAL, "VSOUT_TOAL", 0x3A, 2},
+ {VSOUT_START, "VSOUT_START", 0x3C, 2},
+ {VSOUT_END, "VSOUT_END", 0x3E, 2},
+ {CHR_FREQ, "CHR_FREQ", 0x40, 4},
+ {CHR_PHASE, "CHR_PHASE", 0x44, 1},
+ {MISC_45, "MISC_45", 0x45, 1},
+ {MISC_46, "MISC_46", 0x46, 1},
+ {MISC_47, "MISC_47", 0x47, 1},
+ {HSYNC_WID, "HSYNC_WID", 0x48, 1},
+ {BURST_WID, "BURST_WID", 0x49, 1},
+ {BPORCH, "BPORCH", 0x4A, 1},
+ {CB_BURST, "CB_BURST", 0x4B, 1},
+ {CR_BURST, "CR_BURST", 0x4C, 1},
+ {MISC_4D, "MISC_4D", 0x4D, 1},
+ {BLACK_LVL, "BLACK_LVL", 0x4E, 2},
+ {BLANK_LVL, "BLANK_LVL", 0x50, 2},
+ {NUM_LINES, "NUM_LINES", 0x57, 2},
+ {WHITE_LVL, "WHITE_LVL", 0x5E, 2},
+ {CB_GAIN, "CB_GAIN", 0x60, 1},
+ {CR_GAIN, "CR_GAIN", 0x62, 1},
+ {TINT, "TINT", 0x65, 1},
+ {BR_WAY, "BR_WAY", 0x69, 2},
+ {FR_PORCH, "FR_PORCH", 0x6C, 1},
+ {NUM_PIXELS, "NUM_PIXELS", 0x71, 2},
+ {FIRST_LINE, "1ST_LINE", 0x73, 1},
+ {MISC_74, "MISC_74", 0x74, 1},
+ {SYNC_LVL, "SYNC_LVL", 0x75, 1},
+ {VBI_BL_LVL, "VBI_BL_LVL", 0x7C, 2},
+ {SOFT_RST, "SOFT_RST", 0x7E, 1},
+ {ENC_VER, "ENC_VER", 0x7F, 1},
+ {WSS_CONFIG, "WSS_CONFIG", 0x80, 1},
+ {WSS_CLK, "WSS_CLK", 0x81, 2},
+ {WSS_DATAF1, "WSS_DATAF1", 0x83, 3},
+ {WSS_DATAF0, "WSS_DATAF0", 0x86, 3},
+ {WSS_LNF1, "WSS_LNF1", 0x89, 1},
+ {WSS_LNF0, "WSS_LNF0", 0x8A, 1},
+ {WSS_LVL, "WSS_LVL", 0x8B, 2},
+ {MISC_8D, "MISC_8D", 0x8D, 1},
+ {VID_CNTRL0, "VID_CNTRL0", 0x92, 2},
+ {HD_FP_SYNC, "HD_FP_SYNC", 0x94, 2},
+ {HD_YOFF_BP, "HD_YOFF_BP", 0x96, 2},
+ {SYNC_DL, "SYNC_DL", 0x98, 2},
+ {LD_DET, "LD_DET", 0x9C, 2},
+ {DAC_CNTL, "DAC_CNTL", 0x9E, 2},
+ {PWR_MGMT, "PWR_MGMT", 0xA0, 2},
+ {RED_MTX, "RED_MTX", 0xA2, 2},
+ {GRN_MTX, "GRN_MTX", 0xA4, 2},
+ {BLU_MTX, "BLU_MTX", 0xA6, 2},
+ {RED_SCL, "RED_SCL", 0xA8, 2},
+ {GRN_SCL, "GRN_SCL", 0xAA, 2},
+ {BLU_SCL, "BLU_SCL", 0xAC, 2},
+ {CC_F1, "CC_F1", 0xAE, 2},
+ {CC_F2, "CC_F2", 0xB0, 2},
+ {CCC, "CCC", 0xB2, 2},
+ {CCBV, "CCBV", 0xB4, 2},
+ {CC_BKS, "CC_BKS", 0xB6, 2},
+ {HACT_ST, "HACT_ST", 0xB8, 2},
+ {HACK_WD, "HACK_WD", 0xBA, 2},
+ {VACT_ST, "VACT_ST", 0xBC, 2},
+ {VACT_HT, "VACT_HT", 0xBE, 2},
+ {PR_PB, "PR & PB", 0xC0, 2},
+ {Y_BW, "Y_BW", 0xC2, 2},
+ {QPR, "QPR", 0xC4, 2},
+ {UNDEFINED_REGISTER}
+};
+
+typedef struct
+{
+ FOCUS_REGISTER_ID id;
+ unsigned long value;
+} FOCUS_REGISTER_VALUE;
+
+static const FOCUS_REGISTER_VALUE register_set_sdtv[] =
+{
+ {IHO, 0x006D },
+ {IVO, 0x0018 },
+ {IHW, 0x02BA },
+ {VSC, 0xF69C },
+ {HSC, 0x0200 },
+ {BYPASS, 0x0000 },
+ {CR, 0x2200 },
+ {MISC, 0x0113 },
+ {NCON, 0x07C8A8},
+ {NCOD, 0x1B7E48},
+ {PLL_M, 0x21EF },
+ {PLL_N, 0x001F },
+ {PLL_PD, 0x0303 },
+ {FIFO_LAT, 0x0082 },
+ {VSOUT_TOTAL, 0x0000 },
+ {VSOUT_START, 0x0000 },
+ {VSOUT_END, 0x0000 },
+ {VID_CNTRL0, 0x0340 },
+ {HD_FP_SYNC, 0x0074 },
+ {HD_YOFF_BP, 0x0074 },
+ {DAC_CNTL, 0x00E4 },
+ {PWR_MGMT, 0x0200 },
+ {RED_MTX, 0x004D },
+ {GRN_MTX, 0x0096 },
+ {BLU_MTX, 0x001D },
+ {RED_SCL, 0x00A0 },
+ {GRN_SCL, 0x00DB },
+ {BLU_SCL, 0x007E },
+ {UNDEFINED_REGISTER}
+};
+
+static const FOCUS_REGISTER_VALUE register_set_hdtv[] =
+{
+ {IHO, 0x0000 },
+ {IVO, 0x0000 },
+ {IHW, 0x02D0 },
+ {VSC, 0x0000 },
+ {HSC, 0x0000 },
+ {BYPASS, 0x0000 },
+ {CR, 0x2200 },
+ {MISC, 0x0013 },
+ {NCON, 0x000000},
+ {NCOD, 0x000000},
+ {PLL_M, 0x4118 },
+ {PLL_N, 0x001a },
+ {PLL_PD, 0x0a0a },
+ {FIFO_LAT, 0x0082 },
+ {VSOUT_TOTAL, 0x0000 },
+ {VSOUT_START, 0x0000 },
+ {VSOUT_END, 0x0000 },
+ {VID_CNTRL0, 0x033a },
+ {HD_FP_SYNC, 0x2d3f },
+ {HD_YOFF_BP, 0x003b },
+ {DAC_CNTL, 0x00E4 },
+ {PWR_MGMT, 0x0400 },
+ {RED_MTX, 0x004D },
+ {GRN_MTX, 0x0096 },
+ {BLU_MTX, 0x001D },
+ {RED_SCL, 0x0058 },
+ {GRN_SCL, 0x008a },
+ {BLU_SCL, 0x004a },
+ {MISC_8D, 0x00 },
+ {SYNC_DL, 0x0000 },
+ {HACT_ST, 0x0000 },
+ {HACK_WD, 0x0000 },
+ {VACT_ST, 0x0000 },
+ {VACT_HT, 0x0000 },
+ {UNDEFINED_REGISTER}
+};
+
+//Init, Deinit routines
+int focus_init_component(void);
+int focus_init_cvsv(void);
+int focus_init_hdtv(void);
+int focus_shutdown(void);
+
+
+#endif //FOCUS_H
+
diff -Naur linux26-cvs/drivers/video/focus/Makefile linux26-fs4553/drivers/video/focus/Makefile--- linux26-cvs/drivers/video/focus/Makefile 1969-12-31 18:00:00.000000000 -0600+++ linux26-fs4553/drivers/video/focus/Makefile 2005-08-09 14:40:13.000000000 -0500@@ -0,0 +1,6 @@+obj-$(CONFIG_FOCUS_ENHANCEMENTS) += focus.o sio.o
+
+# Platform specific communication code
+
+obj-$(CONFIG_SOC_AU1200) += sioll_au1xxx.o
+obj-$(CONFIG_SOC_AU1100) += sioll_au1xxx.o
diff -Naur linux26-cvs/drivers/video/focus/os.h linux26-fs4553/drivers/video/focus/os.h--- linux26-cvs/drivers/video/focus/os.h 1969-12-31 18:00:00.000000000 -0600+++ linux26-fs4553/drivers/video/focus/os.h 2005-08-09 14:40:13.000000000 -0500@@ -0,0 +1,49 @@+
+#include <linux/config.h>
+#include <linux/delay.h>
+#include <linux/console.h>
+
+#include <asm/mach-au1x00/au1000.h>
+#include <asm/mach-au1x00/au1xxx_gpio.h>
+
+#ifdef CONFIG_MIPS_DB1200
+ #define DB1200
+ #include <asm/mach-db1x00/db1200.h>
+#endif
+
+#if defined(CONFIG_SOC_AU1200)
+ #define AU1200
+ #define SYS_PINFUNC_P0B (1<<4)
+ #define GPIO_DATA 18
+ #define GPIO_CLOCK 25
+#elif defined(CONFIG_SOC_AU1100)
+ #define AU1100
+ //#define GPIO_DATA 22
+ //#define GPIO_CLOCK 4
+ #define GPIO_DATA 4
+ #define GPIO_CLOCK 1
+#endif
+
+#define uint8 u8
+#define uint16 u16
+#define uint32 u32
+
+#define OS_mdelay mdelay
+#define OS_udelay udelay
+#define OS_set_config_bits ficmmp_config_set
+#define OS_clear_config_bits ficmmp_config_clear
+#define OS_gpio_write au1xxx_gpio_write
+#define OS_gpio_read au1xxx_gpio_read
+#define OS_gpio_tristate au1xxx_gpio_tristate
+#define OS_gpio_set_inputs au1xxx_gpio1_set_inputs
+#define OS_printf printk
+
+
+#define _DEBUG
+#ifdef _DEBUG
+/* note: prints function name for you */
+#define DPRINTF(fmt, args...) printk(fmt, ## args)
+#else
+#define DPRINTF
+#endif
+
diff -Naur linux26-cvs/drivers/video/focus/sio.c linux26-fs4553/drivers/video/focus/sio.c--- linux26-cvs/drivers/video/focus/sio.c 1969-12-31 18:00:00.000000000 -0600+++ linux26-fs4553/drivers/video/focus/sio.c 2005-08-09 14:40:13.000000000 -0500@@ -0,0 +1,489 @@+// SIO_Focus.c
+
+// Copyright (c) 1999-2001, FOCUS Enhancements, Inc., All Rights Reserved.
+
+#include "os.h"
+#include "sioll.h"
+#include "sio.h"
+
+
+#define SIOWRITE 0x00 // Write address
+#define SIOREAD 0x01 // Read address
+
+#define SIOACK 0x00 // Ack value
+#define SIONACK 0x01 // Not - ack value
+
+// #define TRACE(x) printf(x);
+
+//----------------------------------------------------------------------
+//
+// void send_start(void)
+//
+// Sends an SIO start signal on the bus.
+//
+//----------------------------------------------------------------------
+static void send_start(void)
+{
+ SIOLL_output_data(1);
+ SIOLL_output_clock(1);
+ SIOLL_output_data(0);
+ SIOLL_output_clock(0);
+}
+
+//----------------------------------------------------------------------
+//
+// void send_stop(void)
+//
+// Sends an SIO stop signal on the bus.
+//
+//----------------------------------------------------------------------
+static void send_stop(void)
+{
+ SIOLL_output_data(0);
+ SIOLL_output_clock(1);
+ SIOLL_output_data(1);
+}
+
+//----------------------------------------------------------------------
+//
+// void send_ack(void)
+//
+// Sends the Ack signal on the SIO bus.
+//
+//----------------------------------------------------------------------
+static void send_ack(void)
+{
+ SIOLL_output_data(0);
+ SIOLL_output_clock(1);
+ SIOLL_output_clock(0);
+}
+
+//----------------------------------------------------------------------
+//
+// void send_nack(void)
+//
+// Sends the Nt-Ack signal on the SIO bus.
+//
+//----------------------------------------------------------------------
+static void send_nack(void)
+{
+ SIOLL_output_data(1);
+ SIOLL_output_clock(1);
+ SIOLL_output_clock(0);
+}
+
+//----------------------------------------------------------------------
+//
+// UInt8 send_data( UInt8 inData )
+//
+// Sends a byte of data on the SIO bus and returns the TRUE if the slave ACK'd
+// the data.
+//
+// Input: inData - the byte of data to send
+// Output: (return) - TRUE (1) if ACK was received, FALSE (0) if not
+//
+//----------------------------------------------------------------------
+static void send_data(unsigned char data)
+{
+ unsigned char bit;
+
+//printf("Sending Data: %X\n", data);
+ // Send all 8 bits of data byte, MSB to LSB
+ for (bit = 0x80; bit != 0; bit >>= 1)
+ {
+ if (data & bit)
+ SIOLL_output_data(1);
+ else
+ SIOLL_output_data(0);
+
+ SIOLL_output_clock(1);
+ SIOLL_output_clock(0);
+ }
+}
+
+//----------------------------------------------------------------------
+//
+// UInt8 receive_ack( )
+//
+// Receives the Ack (or Nack) from the slave.
+//
+// Output: (return) - TRUE (1) if ACK was received, FALSE (0) if not
+//
+//----------------------------------------------------------------------
+static unsigned char receive_ack(void)
+{
+ unsigned char bit;
+
+ //printf("Receive ACK\n"); getc();
+ // Test for Ack/Nack
+ SIOLL_set_data_for_input();
+ //SIOLL_output_data(1);
+ SIOLL_output_clock(1);
+ bit = SIOLL_input_data();
+ SIOLL_output_clock(0);
+ SIOLL_set_data_for_output();
+ //printf("Ack: %d\n", bit);
+ return !bit;
+}
+
+//----------------------------------------------------------------------
+//
+// unsigned char receive_data(void)
+//
+// Receives a byte of data from the SIO bus.
+//
+// Output: (return) - The data byte recehved from the bus
+//
+//----------------------------------------------------------------------
+static unsigned char receive_data(void)
+{
+ unsigned char data = 0;
+ unsigned char x;
+
+ // make sure the data line is released
+ SIOLL_set_data_for_input();
+ SIOLL_output_data(1);
+
+ // shift in the data
+ for (x=0; x<8; x++)
+ {
+ // shift the data left
+ SIOLL_output_clock(1);
+ data <<= 1;
+ data |= SIOLL_input_data();
+ SIOLL_output_clock(0);
+ }
+
+ SIOLL_set_data_for_output();
+ SIOLL_output_data(1);
+ return data;
+}
+
+
+//----------------------------------------------------------------------
+//
+// void SIO_init(void)
+//
+// This routine initializes the SIO interface. Clients of the SIO module
+// will call this routine before calling any other routine in the module.
+//
+//----------------------------------------------------------------------
+static int g_initialized = 0;
+
+int SIO_init(void)
+{
+ int err;
+
+ DPRINTF("\n");
+
+ // init SIO low-level abstraction layer
+ err = SIOLL_init_smbus();
+ if (err) return err;
+
+ // set the clock and data lines to the proper states
+ SIOLL_output_clock(1);
+ SIOLL_output_data(1);
+ SIOLL_set_data_for_output();
+
+ send_start();
+ send_stop();
+ send_stop();
+
+ g_initialized = 1;
+
+ return 0;
+}
+
+//----------------------------------------------------------------------
+//
+// void SIO_cleanup(void)
+//
+// This routine disables the SIO interface. Clients of the SIO module will not
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