icpld.qsf

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# Copyright (C) 1991-2006 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		icpld_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name DEVICE "EPM3256AQC208-10"
set_global_assignment -name FAMILY MAX3000A
set_global_assignment -name TOP_LEVEL_ENTITY icpld
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 6.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "13:00:30  MARCH 04, 2008"
set_global_assignment -name LAST_QUARTUS_VERSION 6.1
set_global_assignment -name VERILOG_FILE icpld.v
set_global_assignment -name VECTOR_WAVEFORM_FILE icpld.vwf
set_global_assignment -name INCREMENTAL_VECTOR_INPUT_SOURCE icpld.vwf
set_location_assignment PIN_7 -to CPU_RST
set_location_assignment PIN_117 -to DIPCTRL[1]
set_location_assignment PIN_115 -to DIPCTRL[0]
set_location_assignment PIN_13 -to EXT_CLK
set_location_assignment PIN_21 -to FPGA2RAM_ADDR_EN
set_location_assignment PIN_20 -to FPGA2RAM_DATA_DIR
set_location_assignment PIN_19 -to FPGA2RAM_DATA_EN
set_location_assignment PIN_62 -to FPGA_ADDR[7]
set_location_assignment PIN_61 -to FPGA_ADDR[6]
set_location_assignment PIN_60 -to FPGA_ADDR[5]
set_location_assignment PIN_59 -to FPGA_ADDR[4]
set_location_assignment PIN_58 -to FPGA_ADDR[3]
set_location_assignment PIN_57 -to FPGA_ADDR[2]
set_location_assignment PIN_56 -to FPGA_ADDR[1]
set_location_assignment PIN_55 -to FPGA_ADDR[0]
set_location_assignment PIN_10 -to FPGA_CLK
set_location_assignment PIN_71 -to FPGA_DATA[7]
set_location_assignment PIN_70 -to FPGA_DATA[6]
set_location_assignment PIN_69 -to FPGA_DATA[5]
set_location_assignment PIN_68 -to FPGA_DATA[4]
set_location_assignment PIN_67 -to FPGA_DATA[3]
set_location_assignment PIN_66 -to FPGA_DATA[2]
set_location_assignment PIN_65 -to FPGA_DATA[1]
set_location_assignment PIN_64 -to FPGA_DATA[0]
set_location_assignment PIN_3 -to FPGA_RD
set_location_assignment PIN_9 -to FPGA_RESET
set_location_assignment PIN_4 -to FPGA_WR
set_location_assignment PIN_31 -to FREGSEL_LATCH_OE
set_location_assignment PIN_121 -to FREGSEL_LATCH_EN
set_location_assignment PIN_36 -to INTr[3]
set_location_assignment PIN_35 -to INTr[2]
set_location_assignment PIN_34 -to INTr[1]
set_location_assignment PIN_33 -to INTr[0]
set_location_assignment PIN_98 -to LCD_CTRL[2]
set_location_assignment PIN_97 -to LCD_CTRL[1]
set_location_assignment PIN_96 -to LCD_CTRL[0]
set_location_assignment PIN_112 -to LCD_DATA[7]
set_location_assignment PIN_111 -to LCD_DATA[6]
set_location_assignment PIN_110 -to LCD_DATA[5]
set_location_assignment PIN_109 -to LCD_DATA[4]
set_location_assignment PIN_102 -to LCD_DATA[3]
set_location_assignment PIN_101 -to LCD_DATA[2]
set_location_assignment PIN_100 -to LCD_DATA[1]
set_location_assignment PIN_99 -to LCD_DATA[0]
set_location_assignment PIN_12 -to MCU_CLK
set_location_assignment PIN_78 -to MCU_CODE[3]
set_location_assignment PIN_77 -to MCU_CODE[2]
set_location_assignment PIN_76 -to MCU_CODE[1]
set_location_assignment PIN_73 -to MCU_CODE[0]
set_location_assignment PIN_28 -to MCU_RD
set_location_assignment PIN_8 -to MCU_RST_CTRL
set_location_assignment PIN_95 -to MCU_SEL[11]
set_location_assignment PIN_93 -to MCU_SEL[10]
set_location_assignment PIN_92 -to MCU_SEL[9]
set_location_assignment PIN_91 -to MCU_SEL[8]
set_location_assignment PIN_90 -to MCU_SEL[7]
set_location_assignment PIN_89 -to MCU_SEL[6]
set_location_assignment PIN_88 -to MCU_SEL[5]
set_location_assignment PIN_87 -to MCU_SEL[4]
set_location_assignment PIN_86 -to MCU_SEL[3]
set_location_assignment PIN_81 -to MCU_SEL[2]
set_location_assignment PIN_80 -to MCU_SEL[1]
set_location_assignment PIN_79 -to MCU_SEL[0]
set_location_assignment PIN_29 -to MCU_WR
set_location_assignment PIN_49 -to PS2KB_CLOCK
set_location_assignment PIN_48 -to PS2KB_DATA
set_location_assignment PIN_114 -to PS2MOUSE_CLOCK
set_location_assignment PIN_113 -to PS2MOUSE_DATA
set_location_assignment PIN_46 -to TXD_CPLD
set_location_assignment PIN_17 -to SWITCH_MODE[2]
set_location_assignment PIN_16 -to SWITCH_MODE[1]
set_location_assignment PIN_15 -to SWITCH_MODE[0]
set_location_assignment PIN_11 -to SWCLK
set_location_assignment PIN_47 -to RXD_CPLD
set_location_assignment PIN_39 -to RS_CLK
set_location_assignment PIN_38 -to RAM_WR
set_location_assignment PIN_37 -to RAM_OE
set_location_assignment PIN_45 -to RAM_EN[3]
set_location_assignment PIN_44 -to RAM_EN[2]
set_location_assignment PIN_43 -to RAM_EN[1]
set_location_assignment PIN_42 -to RAM_EN[0]
set_location_assignment PIN_27 -to RAM_DATA_SEL[3]
set_location_assignment PIN_26 -to RAM_DATA_SEL[2]
set_location_assignment PIN_25 -to RAM_DATA_SEL[1]
set_location_assignment PIN_24 -to RAM_DATA_SEL[0]
set_location_assignment PIN_18 -to RAM_DATA_DIR
set_location_assignment PIN_22 -to RAM_ADDR_LATCH_OE
set_location_assignment PIN_120 -to RAM_ADDR_LATCH[2]
set_location_assignment PIN_119 -to RAM_ADDR_LATCH[1]
set_location_assignment PIN_118 -to RAM_ADDR_LATCH[0]