⭐ 欢迎来到虫虫下载站！ | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站
📤 上传资源

📄 main.c

📁 it is drive code for testing all function about ad5498
💻 C
📖 第 1 页 / 共 2 页
字号:
🔍
12 


#include "89S52.H"
#include "DDSVARIABLE.H"
#include "DDSFUNCTION.H"
#include "DefinedMCUPin.h"
main()
{

	unsigned char i;
	unsigned int j;
	for(i=0;i<255;i++);
	Initial();
	UpdateFlag=1;
	codeU=0x00;
	while(1)
    {
		//function is to analysis user order and user selecting data
		//and operate the DDS chip

		if(UpdateFlag)
		{
       		AnalysisUserOrder();
		}
	}
}


/*void TimerInterrupt(void) interrupt 5 using 2
{
	cpOrder=0;
    cpOrder=1;
	cpOrder=0;
//	UserOrder=0xff;
//	for(i=0;i<10;i++);
    codeU=UserOrder;
//	codeU=0x00;
	if(codeU!=CodeCurrent)
	{
		UpdateFlag=1;
		CodeCurrent=codeU;
	}
	else
	{
		UpdateFlag=0;
	}
}*/

/*void Timer0Interrupt(void) interrupt 0 using 2
{
	TF0=0;
//	TMOD=0x0c;
//	TR0=1;
//	IE0=1;
	TL0=0xff;
	TH0=0xff;
//	EX0=1;
//	EA=1;
	cpOrder=0;
    cpOrder=1;
	cpOrder=0;
//	UserOrder=0xff;
//	for(i=0;i<10;i++);
    codeU=UserOrder;
//	codeU=0x00;
	if(codeU!=CodeCurrent)
	{
		UpdateFlag=1;
		CodeCurrent=codeU;
	}
	else
	{
		UpdateFlag=0;
	}
}*/

void Timer0Interrupt(void) interrupt 0 using 2
{
//	TF0=0;
//	TMOD=0x0c;
//	TR0=1;
//	IE0=1;
//	TL0=0xff;
//	TH0=0xff;
//	EX0=1;
//	EA=1;
	cpOrder=0;
    cpOrder=1;
	cpOrder=0;
//	UserOrder=0xff;
//	for(i=0;i<10;i++);
    codeU=UserOrder;
//	codeU=0x00;
	if(codeU!=CodeCurrent)
	{
		UpdateFlag=1;
		CodeCurrent=codeU;
	}
	else
	{
		UpdateFlag=0;
	}
}


void AnalysisUserOrder(void)
{
//	unsigned char codeU;
//	unsigned char i;
	UpdateFlag=0;
//    cpOrder=0;
//    cpOrder=1;
//	cpOrder=0;
//	UserOrder=0xff;
//	for(i=0;i<10;i++);
//   codeU=UserOrder;
//	codeU=0x00;
//	if(codeU!=CodeCurrent)
//	{
//		CodeCurrent=codeU;
//using ext clk prevented write scheduling interrupt by int clk signal
		WriteRegByte(0x00,0x1f);//select ext clk,mode=000,CLRACC1=0
		UpdatePin=1;
		UpdatePin=0;
	    switch(codeU)
	    {
	        case 0x00:      //single Tone mode,data select=0
				TW1[5]=0xcc;//sysclk=200MHz,freq=10M
				TW1[4]=0xcc;
				TW1[3]=0xcc;
				TW1[2]=0xcc;
				TW1[1]=0xcc;
				TW1[0]=0x0c;		
				
				PhaseAd1[1]=0;
				PhaseAd1[0]=0;

				ShapeKI[1]=0x00;
				ShapeKI[0]=0x00;
				ShapeKQ[1]=0x00;
				ShapeKQ[0]=0x00;

				PhaseAd2[1]=0x0;
				PhaseAd2[0]=0x0;
				ShapeKR=0x00;
				OneFrequency();
	            break;

	        case 0x08:       //single Tone mode,data select=1
				TW1[5]=0x00;//sysclk=200MHz,freq=50M
				TW1[4]=0x00;
				TW1[3]=0x00;
				TW1[2]=0x00;
				TW1[1]=0x00;
				TW1[0]=0x40;
				
				PhaseAd1[1]=0;
				PhaseAd1[0]=0;
			
				PhaseAd2[1]=0x0;
				PhaseAd2[0]=0x0;
			
				ShapeKR=0x00;
				OneFrequency();
	            break;
	
	        case 0x01:      //FSK mode,data select=0
							//sysclk=200MHz,f1=30M,f2=20M
							//implement FskNoRamp

				TW1[5]=0x66;//sysclk=200MHz,freq=30M
				TW1[4]=0x66;
				TW1[3]=0x66;
				TW1[2]=0x66;
				TW1[1]=0x66;
				TW1[0]=0x26;
			
				TW2[5]=0x99;//sysclk=200MHz,freq=20M
				TW2[4]=0x99;
				TW2[3]=0x99;
				TW2[2]=0x99;
				TW2[1]=0x99;
				TW2[0]=0x19;
		
				ShapeKI[1]=0xff;
				ShapeKI[0]=0xff;
			
				ShapeKQ[1]=0xff;
				ShapeKQ[0]=0xff;
			
				PhaseAd1[1]=0;
				PhaseAd1[0]=0;
			
				PhaseAd2[1]=0x0;
				PhaseAd2[0]=0x0;
			
				ShapeKR=0x00;
				FskNoRamp();
	            break;

			 case 0x02:      //ramp FSK mode,data select=0
							//sysclk=200MHz,freq=20M
							//implement TriFsk
				TW1[5]=0x99;//sysclk=200MHz,freq=20M
				TW1[4]=0x99;
				TW1[3]=0x99;
				TW1[2]=0x99;
				TW1[1]=0x99;
				TW1[0]=0x19;
		
				TW2[5]=0x66;//freq=30M
				TW2[4]=0x66;
				TW2[3]=0x66;
				TW2[2]=0x66;
				TW2[1]=0x66;
				TW2[0]=0x26;
			
				//sysclk=200MHz,△freq=10kHz
				DFW[5]=0x63;
				DFW[4]=0x5d;
				DFW[3]=0xdc;
				DFW[2]=0x46;
				DFW[1]=0x03;
				DFW[0]=0x00;

			
				//sysclk=200MHz,ramp is 5.2ms
				RampRC[2]=0xff;
				RampRC[1]=0xff;
				RampRC[0]=0x0f;
				
				ShapeKI[1]=0xff;
				ShapeKI[0]=0xff;
			
				// full scall of amt
				ShapeKQ[1]=0xff;
				ShapeKQ[0]=0xff;
				ShapeKR=0x04;
				TriFsk();
	            break;

			 case 0x0a:     //ramp FSK mode,data select=0
							//sysclk=200MHz,freq=20M
							//implement RampFsk				
				TW1[5]=0x99;//freq=20M
				TW1[4]=0x99;
				TW1[3]=0x99;
				TW1[2]=0x99;
				TW1[1]=0x99;
				TW1[0]=0x19;
	
				
				TW2[5]=0x66;//freq=30M
				TW2[4]=0x66;
				TW2[3]=0x66;
				TW2[2]=0x66;
				TW2[1]=0x66;
				TW2[0]=0x26;

				//sysclk=200MHz,△freq=10kHz
				DFW[5]=0x63;
				DFW[4]=0x5d;
				DFW[3]=0xdc;
				DFW[2]=0x46;
				DFW[1]=0x03;
				DFW[0]=0x00;
		
				//step ramp is 5.2ms,sysclk=200MHz
				//RampRC[2]=0xff;
				RampRC[2]=0x0a;
				RampRC[1]=0xff;
				RampRC[0]=0x0f;
			
			
				ShapeKI[1]=0xff;
				ShapeKI[0]=0xff;
			
				ShapeKQ[1]=0xff;
				ShapeKQ[0]=0xff;
			
				ShapeKR=0x00;

				RampFsk();
	            break;
	
	        case 0x03:         //chirp,data select=0
							//sysclk=200MHz
							//implement FmChip();
				TW1[5]=0x99;//sysclk=200MHz,freq=20M
				TW1[4]=0x99;
				TW1[3]=0x99;
				TW1[2]=0x99;
				TW1[1]=0x99;
				TW1[0]=0x19;

				TW2[5]=0x66;//freq=30M
				TW2[4]=0x66;
				TW2[3]=0x66;
				TW2[2]=0x66;
				TW2[1]=0x66;
				TW2[0]=0x26;
				
			
			//sysclk=200MHz,△freq=10kHz
				DFW[5]=0x63;
				DFW[4]=0x5d;
				DFW[3]=0xdc;
				DFW[2]=0x46;
				DFW[1]=0x03;
				DFW[0]=0x00;
			
				//sysclk=200MHz,ramp is 5.2ms
				RampRC[2]=0xff;
				RampRC[1]=0xff;
				RampRC[0]=0x0f;
			
				ShapeKI[1]=0xff;
				ShapeKI[0]=0xff;
			
				ShapeKQ[1]=0xff;
				ShapeKQ[0]=0xff;
			
				PhaseAd1[1]=0;
				PhaseAd1[0]=0;
			
				PhaseAd2[1]=0xff;
				PhaseAd2[0]=0xff;
			
				ShapeKR=0xff;

				FmChip();
	            break;

	        case 0x0b:        //chirp,data select=1
							//sysclk=200MHz
							//implement Clracc2Chip();
				TW1[5]=0x66;//sysclk=200MHz,freq=30M
				TW1[4]=0x66;
				TW1[3]=0x66;
				TW1[2]=0x66;
				TW1[1]=0x66;
				TW1[0]=0x26;
			
			//sysclk=200MHz,△freq=10kHz
				DFW[5]=0x63;
				DFW[4]=0x5d;
				DFW[3]=0xdc;
				DFW[2]=0x46;
				DFW[1]=0x03;
				DFW[0]=0x00;
			
			
				//sysclk=200MHz,ramp is 5.2ms		
				RampRC[2]=0xff;
				RampRC[1]=0xff;
				RampRC[0]=0x0f;
			
				ShapeKI[1]=0xff;
				ShapeKI[0]=0xff;
			
				ShapeKQ[1]=0xff;
				ShapeKQ[0]=0xff;
			
				PhaseAd1[1]=0;
				PhaseAd1[0]=0;
			
				PhaseAd2[1]=0xff;
				PhaseAd2[0]=0xff;
			
				ShapeKR=0x00;
			
				Clracc2Chip();
	            break;

	        case 0x1b:         //chirp,data select=0
							//sysclk=200MHz
							//implement FmChip();
				TW1[5]=0x99;//sysclk=200MHz,freq=20M
				TW1[4]=0x99;
				TW1[3]=0x99;
				TW1[2]=0x99;
				TW1[1]=0x99;
				TW1[0]=0x19;

			/*	TW1[5]=0x66;//sysclk=200MHz,freq=30M
				TW1[4]=0x66;
				TW1[3]=0x66;
				TW1[2]=0x66;
				TW1[1]=0x66;
				TW1[0]=0x26;*/

				TW2[5]=0x66;//freq=30M
				TW2[4]=0x66;
				TW2[3]=0x66;
				TW2[2]=0x66;
				TW2[1]=0x66;
				TW2[0]=0x26;
				//sysclk=200MHz,upclk time is 6s
				UpdateClk[3]=0x00;
				UpdateClk[2]=0x46;
				UpdateClk[1]=0xc3;
				UpdateClk[0]=0x23;

				//sysclk=200MHz,upclk time is 43s
			/*	UpdateClk[3]=0xff;
				UpdateClk[2]=0xff;
				UpdateClk[1]=0xff;
				UpdateClk[0]=0xff;*/
			
			//sysclk=200MHz,△freq=10kHz
				DFW[5]=0x63;
				DFW[4]=0x5d;
				DFW[3]=0xdc;
				DFW[2]=0x46;
				DFW[1]=0x03;
				DFW[0]=0x00;
			
				//sysclk=200MHz,ramp is 5.2ms
				RampRC[2]=0xff;
				RampRC[1]=0xff;
				RampRC[0]=0x0f;
			
				ShapeKI[1]=0xff;
				ShapeKI[0]=0xff;
			
				ShapeKQ[1]=0xff;
				ShapeKQ[0]=0xff;
			
				PhaseAd1[1]=0;
				PhaseAd1[0]=0;
			
				PhaseAd2[1]=0xff;
				PhaseAd2[0]=0xff;
			
				ShapeKR=0xff;

				FmChipEx();
	            break;

	        default:
	            break;
	    }
//	}
}
void OneFrequency(void)
{

/*	TW1[5]=0xcc;//sysclk=200MHz,freq=10M
	TW1[4]=0xcc;
	TW1[3]=0xcc;
	TW1[2]=0xcc;
	TW1[1]=0xcc;
	TW1[0]=0x0c;

	
	TW1[5]=0x58;//sysclk=200MHz,freq=11.3M
	TW1[4]=0x39;
	TW1[3]=0xb4;
	TW1[2]=0xc8;
	TW1[1]=0x76;
	TW1[0]=0x0e;

	TW1[5]=0xa9;//sysclk=200MHz,freq=50.3M
	TW1[4]=0xf1;
	TW1[3]=0xd2;
	TW1[2]=0x4d;
	TW1[1]=0x62;
	TW1[0]=0x40;

	TW1[5]=0x00;//sysclk=200MHz,freq=50M
	TW1[4]=0x00;
	TW1[3]=0x00;
	TW1[2]=0x00;
	TW1[1]=0x00;
	TW1[0]=0x40;


	PhaseAd1[1]=0;
	PhaseAd1[0]=0;

	PhaseAd2[1]=0x0;
	PhaseAd2[0]=0x0;

	ShapeKR=0x00;*/

	WriteReg(PhaseAd1,0x00,2);
	WriteReg(PhaseAd2,0x02,2);

	WriteReg(ShapeKI,0x21,2);
	WriteReg(ShapeKQ,0x23,2);
	
	WriteRegByte(0,0x1f);//select ext clk
//	WriteRegByte(0,0x1D);//disable DAC power down
//	WriteRegByte(0x10,0x1D);//disable comp DAC ,disable DAC
	WriteRegByte(0x30,0x20);//to full-scale amplitude.
							//OSK EN=1,OSK INT=1
	WriteReg(TW1,0x04,6);
	UpdatePin=1;
	UpdatePin=0;
}

unsigned char  ConvDa(unsigned char da)
{
	unsigned char da1=0;
	unsigned char i;
	for(i=1;i<=7;i++)
	{
		if(da&0x80)
		{
			da1|=0x80;
		}
		da1>>=1;
		da<<=1;
	}
	if(da&0x80)
	{
		da1|=0x80;
	}
	return(da1);
}

void FskNoRamp(void)
{
	unsigned char i;
	unsigned int j;
/*	TW1[5]=0xcc;
	TW1[4]=0xcc;
	TW1[3]=0xcc;
	TW1[2]=0xcc;
	TW1[1]=0xcc;
	TW1[0]=0x0c;*/

/*	TW1[5]=0x66;//sysclk=200MHz,freq=30M
	TW1[4]=0x66;
	TW1[3]=0x66;
	TW1[2]=0x66;
	TW1[1]=0x66;
	TW1[0]=0x26;

	TW2[5]=0x99;//sysclk=200MHz,freq=20M
	TW2[4]=0x99;
	TW2[3]=0x99;
	TW2[2]=0x99;
	TW2[1]=0x99;
	TW2[0]=0x19;

	TW1[5]=0x33;//sysclk=200MHz,freq=15M
	TW1[4]=0x33;
	TW1[3]=0x33;
	TW1[2]=0x33;
	TW1[1]=0x33;
	TW1[0]=0x13;

	TW2[5]=0x16;//sysclk=200MHz,freq=15.1M
	TW2[4]=0xd9;
	TW2[3]=0xce;
	TW2[2]=0xf7;
	TW2[1]=0x53;
	TW2[0]=0x13;

	ShapeKI[1]=0xff;
	ShapeKI[0]=0xff;

	ShapeKQ[1]=0xff;
	ShapeKQ[0]=0xff;

	ShapeKR=0x00;

	PhaseAd1[1]=0;
	PhaseAd1[0]=0;

	PhaseAd2[1]=0x0;
	PhaseAd2[0]=0x0;

	ShapeKR=0x00;*/

	WriteRegByte(2,0x1f);//select ext clk,mode=001
//	WriteRegByte(0,0x1D);//disable DAC power down
	WriteRegByte(0x60,0x20);//to full-scale amplitude.
	WriteReg(TW1,0x04,6);
	WriteReg(TW2,0x0a,6);

	WriteReg(ShapeKI,0x21,2);
	WriteReg(ShapeKQ,0x23,2);
	WriteRegByte(ShapeKR,0x25);

	UpdatePin=1;
	UpdatePin=0;	
	while(1)
	{
		if(UpdateFlag)
		{
			break;
		}
		fbh=1;
		for(i=0;i<255;i++);
		for(i=0;i<255;i++);
		for(i=0;i<255;i++);
		for(i=0;i<255;i++);
		for(j=0;j<65535;j++);
		fbh=0;
		for(i=0;i<255;i++);
		for(i=0;i<255;i++);
		for(i=0;i<255;i++);
		for(i=0;i<255;i++);
		for(j=0;j<65535;j++);

	}
}

void FmChip(void)
{
	unsigned char i;
	unsigned int j;


/*	TW1[5]=0x99;//sysclk=200MHz,freq=20M
	TW1[4]=0x99;
	TW1[3]=0x99;
	TW1[2]=0x99;
	TW1[1]=0x99;
	TW1[0]=0x19;
	TW1[5]=0x66;//sysclk=200MHz,freq=20M
	TW1[4]=0x66;
	TW1[3]=0x66;
	TW1[2]=0x66;
	TW1[1]=0x66;
	TW1[0]=0x26;

	TW2[5]=0x66;//freq=30M
	TW2[4]=0x66;
	TW2[3]=0x66;
	TW2[2]=0x66;
12

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -