transcript

来自「FPGA系统的sram的软仿真设计」· 代码 · 共 41 行

# Reading E:/Modeltech_5.8/tcl/vsim/pref.tcl 
# //  ModelSim SE 5.8 Nov 01 2003 
# //
# //  Copyright Model Technology, a Mentor Graphics Corporation company, 2003
# //                         All Rights Reserved.
# //                   UNPUBLISHED, LICENSED SOFTWARE.
# //         CONFIDENTIAL AND PROPRIETARY INFORMATION WHICH IS THE
# //        PROPERTY OF MENTOR GRAPHICS CORPORATION OR ITS LICENSORS.
# //
# do my_sram_test_vhd_tb.fdo 
# ** Warning: (vlib-34) Library already exists at "work".
# Model Technology ModelSim SE vcom 5.8 Compiler 2003.11 Nov 11 2003
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Loading package std_logic_arith
# -- Loading package std_logic_unsigned
# -- Compiling entity my_sram
# -- Compiling architecture behavioral of my_sram
# Model Technology ModelSim SE vcom 5.8 Compiler 2003.11 Nov 11 2003
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Loading package numeric_std
# -- Compiling entity my_sram_test_vhd_tb
# -- Compiling architecture behavior of my_sram_test_vhd_tb
# -- Loading package std_logic_arith
# -- Loading package std_logic_unsigned
# -- Loading entity my_sram
# vsim -lib work -t 1ps my_sram_test_vhd_tb 
# Loading E:/Modeltech_5.8/win32/../std.standard
# Loading E:/Modeltech_5.8/win32/../ieee.std_logic_1164(body)
# Loading E:/Modeltech_5.8/win32/../ieee.numeric_std(body)
# Loading E:/Modeltech_5.8/win32/../ieee.std_logic_arith(body)
# Loading E:/Modeltech_5.8/win32/../ieee.std_logic_unsigned(body)
# Loading work.my_sram_test_vhd_tb(behavior)
# Loading work.my_sram(behavioral)
# .wave
# .structure
# .signals
run
destroy .wave