lcd_controller.v

基于MAXII CPLD的对1602字符型液晶进行读写操作

	wire  ufm_arclk;
	wire  ufm_ardin;
	wire  ufm_arshft;
	wire  ufm_bgpbusy;
	wire  ufm_drclk;
	wire  ufm_drdin;
	wire  ufm_drdout;
	wire  ufm_drshft;
	wire  ufm_osc;
	wire  ufm_oscena;
	wire  [8:0]  X_var;
	wire  [8:0]  Y_var;
	wire  [8:0]  Z_var;

	// synopsys translate_off
	initial
		dffe10a0 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a0 <= ufm_drdout;
	// synopsys translate_off
	initial
		dffe10a1 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a1 <= sipo_q[0];
	// synopsys translate_off
	initial
		dffe10a2 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a2 <= sipo_q[1];
	// synopsys translate_off
	initial
		dffe10a3 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a3 <= sipo_q[2];
	// synopsys translate_off
	initial
		dffe10a4 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a4 <= sipo_q[3];
	// synopsys translate_off
	initial
		dffe10a5 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a5 <= sipo_q[4];
	// synopsys translate_off
	initial
		dffe10a6 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a6 <= sipo_q[5];
	// synopsys translate_off
	initial
		dffe10a7 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a7 <= sipo_q[6];
	// synopsys translate_off
	initial
		dffe10a8 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a8 <= sipo_q[7];
	// synopsys translate_off
	initial
		dffe10a9 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a9 <= sipo_q[8];
	// synopsys translate_off
	initial
		dffe10a10 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a10 <= sipo_q[9];
	// synopsys translate_off
	initial
		dffe10a11 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a11 <= sipo_q[10];
	// synopsys translate_off
	initial
		dffe10a12 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a12 <= sipo_q[11];
	// synopsys translate_off
	initial
		dffe10a13 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a13 <= sipo_q[12];
	// synopsys translate_off
	initial
		dffe10a14 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a14 <= sipo_q[13];
	// synopsys translate_off
	initial
		dffe10a15 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (in_read_data_en == 1'b1)   dffe10a15 <= sipo_q[14];
	// synopsys translate_off
	initial
		dffe11a = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (wire_dffe11a_ENA == 1'b1)   dffe11a <= {sipo_q[15:8]};
	assign
		wire_dffe11a_ENA = (dffe7 & (~ tmp_decode));
	// synopsys translate_off
	initial
		dffe12 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		  dffe12 <= busy_arclk;
	// synopsys translate_off
	initial
		dffe13 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		  dffe13 <= busy_drclk;
	// synopsys translate_off
	initial
		dffe2 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		  dffe2 <= start_decode;
	// synopsys translate_off
	initial
		dffe3 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		  dffe3 <= dffe2;
	// synopsys translate_off
	initial
		dffe4 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (start_op == 1'b1)   dffe4 <= mux_nread;
	// synopsys translate_off
	initial
		dffe5 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		  dffe5 <= copy_tmp_decode;
	// synopsys translate_off
	initial
		dffe7 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (data_valid_en == 1'b1)   dffe7 <= tmp_data_valid2;
	// synopsys translate_off
	initial
		dffe8 = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		  dffe8 <= (dffe7 & (~ tmp_decode));
	// synopsys translate_off
	initial
		dffe9a = 0;
	// synopsys translate_on
	always @ ( posedge ufm_osc)
		if (add_en == 1'b1)   dffe9a <= {Z_var};
	// synopsys translate_off
	initial
		wire_cntr6_q_int = 0;
	// synopsys translate_on
	always @(posedge wire_cntr6_clock)
			if ( wire_cntr6_clk_en == 1'b1)
					if (wire_cntr6_q_int[4:0] == 5'd27)
						wire_cntr6_q_int <= 5'b0;
					else
						wire_cntr6_q_int <= wire_cntr6_q_int[4:0] + 1'b1;
	assign
		wire_cntr6_q = wire_cntr6_q_int[4:0];
	assign
		wire_cntr6_clk_en = tmp_decode,
		wire_cntr6_clock = ufm_osc;
	maxii_ufm   maxii_ufm_block1
	( 
	.arclk(ufm_arclk),
	.ardin(ufm_ardin),
	.arshft(ufm_arshft),
	.bgpbusy(wire_maxii_ufm_block1_bgpbusy),
	.busy(),
	.drclk(ufm_drclk),
	.drdin(ufm_drdin),
	.drdout(wire_maxii_ufm_block1_drdout),
	.drshft(ufm_drshft),
	.osc(wire_maxii_ufm_block1_osc),
	.oscena(ufm_oscena)
	`ifdef FORMAL_VERIFICATION
	`else
	// synopsys translate_off
	`endif
	,
	.erase(1'b0),
	.program(1'b0)
	`ifdef FORMAL_VERIFICATION
	`else
	// synopsys translate_on
	`endif
	// synopsys translate_off
	,
	.ctrl_bgpbusy(),
	.devclrn(),
	.devpor(),
	.sbdin(),
	.sbdout()
	// synopsys translate_on
	);
	defparam
		maxii_ufm_block1.address_width = 9,
		maxii_ufm_block1.erase_time = 500000000,
		maxii_ufm_block1.init_file = "lcd_new.hex",
		maxii_ufm_block1.mem1 = 512'hFFFF20FFFFFF52FFFFFF45FFFFFF4CFFFFFF4CFFFFFF4FFFFFFF52FFFFFF54FFFFFF4EFFFFFF4FFFFFFF43FFFFFF20FFFFFF44FFFFFF43FFFFFF4CFFFFFF20FF,
		maxii_ufm_block1.mem10 = 512'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
		maxii_ufm_block1.mem11 = 512'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
		maxii_ufm_block1.mem12 = 512'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
		maxii_ufm_block1.mem13 = 512'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
		maxii_ufm_block1.mem14 = 512'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
		maxii_ufm_block1.mem15 = 512'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
		maxii_ufm_block1.mem16 = 512'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
		maxii_ufm_block1.mem2 = 512'hFFFF20FFFFFF20FFFFFF20FFFFFF20FFFFFF20FFFFFF20FFFFFF20FFFFFF20FFFFFF20FFFFFF20FFFFFF20FFFFFF20FFFFFF20FFFFFF20FFFFFF20FFFFFF20FF,
		maxii_ufm_block1.mem3 = 512'hFFFF49FFFFFF49FFFFFF20FFFFFF58FFFFFF41FFFFFF4DFFFFFF20FFFFFF41FFFFFF52FFFFFF45FFFFFF54FFFFFF4CFFFFFF41FFFFFF20FFFFFF4EFFFFFF4FFF,
		maxii_ufm_block1.mem4 = 512'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
		maxii_ufm_block1.mem5 = 512'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
		maxii_ufm_block1.mem6 = 512'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
		maxii_ufm_block1.mem7 = 512'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
		maxii_ufm_block1.mem8 = 512'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
		maxii_ufm_block1.mem9 = 512'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
		maxii_ufm_block1.osc_sim_setting = 180000,
		maxii_ufm_block1.program_time = 1600000,
		maxii_ufm_block1.lpm_type = "maxii_ufm";
	assign
		add_en = (tmp_add_en & read_op),
		add_load = (tmp_add_load & read_op),
		arclk = (tmp_arclk0 & read_op),
		busy_arclk = arclk,
		busy_drclk = in_read_drclk,
		control_mux = (((~ q4) & ((q3 | q2) | q1)) | q4),
		copy_tmp_decode = tmp_decode,
		data_valid = dffe8,
		data_valid_en = ((q4 & q3) & q1),
		dly_tmp_decode = dffe5,
		do = dffe11a,
		drdin = 1'b0,
		gated1 = dffe12,
		gated2 = dffe13,
		hold_decode = ((~ dffe3) & real_decode),
		in_read_data_en = (tmp_in_read_data_en & read_op),
		in_read_drclk = (tmp_in_read_drclk & read_op),
		in_read_drshft = (tmp_in_read_drshft & read_op),
		mux_nread = (((~ control_mux) & read) | (control_mux & (~ data_valid_en))),
		nbusy = ((~ dly_tmp_decode) & (~ ufm_bgpbusy)),
		osc = ufm_osc,
		q0 = wire_cntr6_q[0],
		q1 = wire_cntr6_q[1],
		q2 = wire_cntr6_q[2],
		q3 = wire_cntr6_q[3],
		q4 = wire_cntr6_q[4],
		read = (~ nread),
		read_op = tmp_read,
		real_decode = start_decode,
		shiftin = {dffe9a[7:0], 1'b0},
		sipo_q = {dffe10a15[0:0], dffe10a14[0:0], dffe10a13[0:0], dffe10a12[0:0], dffe10a11[0:0], dffe10a10[0:0], dffe10a9[0:0], dffe10a8[0:0], dffe10a7[0:0], dffe10a6[0:0], dffe10a5[0:0], dffe10a4[0:0], dffe10a3[0:0], dffe10a2[0:0], dffe10a1[0:0], dffe10a0[0:0]},
		start_decode = (mux_nread & (~ ufm_bgpbusy)),
		start_op = (hold_decode | stop_op),
		stop_op = ((((q4 & q3) & (~ q2)) & q1) & q0),
		tmp_add_en = ((~ q4) & ((~ q3) | ((~ q2) & (~ q1)))),
		tmp_add_load = (~ ((~ q4) & (((((~ q3) & q2) | ((~ q3) & q0)) | ((~ q3) & q1)) | ((q3 & (~ q2)) & (~ q1))))),
		tmp_arclk = (gated1 & (~ ufm_osc)),
		tmp_arclk0 = ((~ q4) & ((~ q3) | (((~ q2) & (~ q1)) & (~ q0)))),
		tmp_ardin = dffe9a[8],
		tmp_arshft = add_en,
		tmp_data_valid2 = (stop_op & read_op),
		tmp_decode = tmp_read,
		tmp_drclk = (gated2 & (~ ufm_osc)),
		tmp_in_read_data_en = (((~ q4) & ((q3 & q2) | (q3 & q1))) | (q4 & (((~ q3) | ((~ q2) & (~ q1))) | (q1 & (~ q0))))),
		tmp_in_read_drclk = (((~ q4) & ((q3 & q2) | (q3 & q1))) | (q4 & (((~ q3) | ((~ q2) & (~ q1))) | (q1 & (~ q0))))),
		tmp_in_read_drshft = (~ (((((~ q4) & q3) & (~ q2)) & q1) & q0)),
		tmp_read = dffe4,
		ufm_arclk = tmp_arclk,
		ufm_ardin = tmp_ardin,
		ufm_arshft = tmp_arshft,
		ufm_bgpbusy = wire_maxii_ufm_block1_bgpbusy,
		ufm_drclk = tmp_drclk,
		ufm_drdin = drdin,
		ufm_drdout = wire_maxii_ufm_block1_drdout,
		ufm_drshft = in_read_drshft,
		ufm_osc = wire_maxii_ufm_block1_osc,
		ufm_oscena = 1'b1,
		X_var = (shiftin & {9{(~ add_load)}}),
		Y_var = (addr & {9{add_load}}),
		Z_var = (X_var | Y_var);
endmodule //UFM2_altufm_parallel_bmm
//VALID FILE


// synopsys translate_off
`timescale 1 ps / 1 ps
// synopsys translate_on
module UFM2 (
	addr,
	nread,
	data_valid,
	do,
	nbusy,
	osc)/* synthesis synthesis_clearbox = 1 */;

	input	[8:0]  addr;
	input	  nread;
	output	  data_valid;
	output	[7:0]  do;
	output	  nbusy;
	output	  osc;

	wire  sub_wire0;
	wire [7:0] sub_wire1;
	wire  sub_wire2;
	wire  sub_wire3;
	wire  osc = sub_wire0;
	wire [7:0] do = sub_wire1[7:0];
	wire  data_valid = sub_wire2;
	wire  nbusy = sub_wire3;

	UFM2_altufm_parallel_bmm	UFM2_altufm_parallel_bmm_component (
				.addr (addr),
				.nread (nread),
				.osc (sub_wire0),
				.do (sub_wire1),
				.data_valid (sub_wire2),
				.nbusy (sub_wire3));

endmodule

// ============================================================
// CNX file retrieval info
// ============================================================
// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "MAX II"
// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "MAX II"
// Retrieval info: PRIVATE: INTENDED_DEVICE_PART STRING ""
// Retrieval info: PRIVATE: INTERFACE_CHOICE NUMERIC "1"
// Retrieval info: PRIVATE: VERSION_NUMBER NUMERIC "0"
// Retrieval info: PRIVATE: WIZMAN_OVERRIDE_CBX_GEN_MODE STRING "ON"
// Retrieval info: CONSTANT: ACCESS_MODE STRING "READ_ONLY"
// Retrieval info: CONSTANT: ERASE_TIME NUMERIC "500000000"
// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "MAX II"
// Retrieval info: CONSTANT: LPM_FILE STRING "lcd_new.hex"
// Retrieval info: CONSTANT: OSC_FREQUENCY NUMERIC "180000"
// Retrieval info: CONSTANT: PROGRAM_TIME NUMERIC "1600000"
// Retrieval info: CONSTANT: WIDTH_ADDRESS NUMERIC "9"
// Retrieval info: CONSTANT: WIDTH_DATA NUMERIC "8"
// Retrieval info: CONSTANT: WIDTH_UFM_ADDRESS NUMERIC "9"
// Retrieval info: USED_PORT: addr 0 0 9 0 INPUT NODEFVAL addr[8..0]
// Retrieval info: USED_PORT: data_valid 0 0 0 0 OUTPUT NODEFVAL data_valid
// Retrieval info: USED_PORT: do 0 0 8 0 OUTPUT NODEFVAL do[7..0]
// Retrieval info: USED_PORT: nbusy 0 0 0 0 OUTPUT NODEFVAL nbusy
// Retrieval info: USED_PORT: nread 0 0 0 0 INPUT NODEFVAL nread
// Retrieval info: USED_PORT: osc 0 0 0 0 OUTPUT NODEFVAL osc
// Retrieval info: CONNECT: @nread 0 0 0 0 nread 0 0 0 0
// Retrieval info: CONNECT: @addr 0 0 9 0 addr 0 0 9 0
// Retrieval info: CONNECT: nbusy 0 0 0 0 @nbusy 0 0 0 0
// Retrieval info: CONNECT: data_valid 0 0 0 0 @data_valid 0 0 0 0
// Retrieval info: CONNECT: do 0 0 8 0 @do 0 0 8 0
// Retrieval info: CONNECT: osc 0 0 0 0 @osc 0 0 0 0
// Retrieval info: GEN_FILE: TYPE_NORMAL UFM2.v TRUE
// Retrieval info: GEN_FILE: TYPE_NORMAL UFM2.inc FALSE
// Retrieval info: GEN_FILE: TYPE_NORMAL UFM2.cmp FALSE
// Retrieval info: GEN_FILE: TYPE_NORMAL UFM2.bsf FALSE
// Retrieval info: GEN_FILE: TYPE_NORMAL UFM2_inst.v FALSE
// Retrieval info: GEN_FILE: TYPE_NORMAL UFM2_bb.v FALSE

/************************************************** END *************************************************************/