fpga_dsp_portlink.map.eqn

implemention of FPGA and DSP linking port, using Asynchronous mode

--E1L34 is MUX:inst10|O1~526
E1L34 = E1L32 & (H1L16 & !Addr[1]) # !E1L32 & P1_q_a[0];


--H1L36 is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|valid_rdreq~29
H1L36 = Addr[1] & !Addr[0] & !CS;


--H1_p0addr is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|p0addr
H1_p0addr = DFFEAS(VCC, !RE, H1_rdaclr,  ,  ,  ,  ,  ,  );


--H1_rdcnt_addr_ena is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|rdcnt_addr_ena
H1_rdcnt_addr_ena = H1L36 & !H1L16 # !H1_p0addr;


--H1_valid_wrreq is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|valid_wrreq
H1_valid_wrreq = CS # H1L38;


--H1_valid_rdreq is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|valid_rdreq
H1_valid_rdreq = Addr[1] & !Addr[0] & !CS & !H1L16;


--K1_power_modified_counter_values[0] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|a_graycounter_p96:rdptr_g1p|power_modified_counter_values[0]
K1_power_modified_counter_values[0] = DFFEAS(K1_countera0, !RE, H1_rdaclr,  ,  ,  ,  ,  ,  );


--K1_power_modified_counter_values[1] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|a_graycounter_p96:rdptr_g1p|power_modified_counter_values[1]
K1_power_modified_counter_values[1] = DFFEAS(K1_countera1, !RE, H1_rdaclr,  ,  ,  ,  ,  ,  );


--K1_power_modified_counter_values[2] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|a_graycounter_p96:rdptr_g1p|power_modified_counter_values[2]
K1_power_modified_counter_values[2] = DFFEAS(K1_countera2, !RE, H1_rdaclr,  ,  ,  ,  ,  ,  );


--K1_power_modified_counter_values[3] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|a_graycounter_p96:rdptr_g1p|power_modified_counter_values[3]
K1_power_modified_counter_values[3] = DFFEAS(K1_countera3, !RE, H1_rdaclr,  ,  ,  ,  ,  ,  );


--K1_power_modified_counter_values[4] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|a_graycounter_p96:rdptr_g1p|power_modified_counter_values[4]
K1_power_modified_counter_values[4] = DFFEAS(K1_countera4, !RE, H1_rdaclr,  ,  ,  ,  ,  ,  );


--K1_power_modified_counter_values[5] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|a_graycounter_p96:rdptr_g1p|power_modified_counter_values[5]
K1_power_modified_counter_values[5] = DFFEAS(K1_countera5, !RE, H1_rdaclr,  ,  ,  ,  ,  ,  );


--K1_power_modified_counter_values[6] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|a_graycounter_p96:rdptr_g1p|power_modified_counter_values[6]
K1_power_modified_counter_values[6] = DFFEAS(K1_countera6, !RE, H1_rdaclr,  ,  ,  ,  ,  ,  );


--K1_power_modified_counter_values[7] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|a_graycounter_p96:rdptr_g1p|power_modified_counter_values[7]
K1_power_modified_counter_values[7] = DFFEAS(K1_countera7, !RE, H1_rdaclr,  ,  ,  ,  ,  ,  );


--K1_power_modified_counter_values[8] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|a_graycounter_p96:rdptr_g1p|power_modified_counter_values[8]
K1_power_modified_counter_values[8] = DFFEAS(K1_countera8, !RE, H1_rdaclr,  ,  ,  ,  ,  ,  );


--K1_power_modified_counter_values[9] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|a_graycounter_p96:rdptr_g1p|power_modified_counter_values[9]
K1_power_modified_counter_values[9] = DFFEAS(K1_countera9, !RE, H1_rdaclr,  ,  ,  ,  ,  ,  );


--K1_power_modified_counter_values[10] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|a_graycounter_p96:rdptr_g1p|power_modified_counter_values[10]
K1_power_modified_counter_values[10] = DFFEAS(K1_countera10, !RE, H1_rdaclr,  ,  ,  ,  ,  ,  );


--H1_wrptr_g[0] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|wrptr_g[0]
H1_wrptr_g[0] = DFFEAS(H1L47, !WE,  ,  , !H1_valid_wrreq,  ,  ,  ,  );


--H1_wrptr_g[1] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|wrptr_g[1]
H1_wrptr_g[1] = DFFEAS(M1_power_modified_counter_values[1], !WE,  ,  , !H1_valid_wrreq,  ,  ,  ,  );


--H1_wrptr_g[2] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|wrptr_g[2]
H1_wrptr_g[2] = DFFEAS(M1_power_modified_counter_values[2], !WE,  ,  , !H1_valid_wrreq,  ,  ,  ,  );


--H1_wrptr_g[3] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|wrptr_g[3]
H1_wrptr_g[3] = DFFEAS(M1_power_modified_counter_values[3], !WE,  ,  , !H1_valid_wrreq,  ,  ,  ,  );


--H1_wrptr_g[4] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|wrptr_g[4]
H1_wrptr_g[4] = DFFEAS(M1_power_modified_counter_values[4], !WE,  ,  , !H1_valid_wrreq,  ,  ,  ,  );


--H1_wrptr_g[5] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|wrptr_g[5]
H1_wrptr_g[5] = DFFEAS(M1_power_modified_counter_values[5], !WE,  ,  , !H1_valid_wrreq,  ,  ,  ,  );


--H1_wrptr_g[6] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|wrptr_g[6]
H1_wrptr_g[6] = DFFEAS(M1_power_modified_counter_values[6], !WE,  ,  , !H1_valid_wrreq,  ,  ,  ,  );


--H1_wrptr_g[7] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|wrptr_g[7]
H1_wrptr_g[7] = DFFEAS(M1_power_modified_counter_values[7], !WE,  ,  , !H1_valid_wrreq,  ,  ,  ,  );


--H1_wrptr_g[8] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|wrptr_g[8]
H1_wrptr_g[8] = DFFEAS(M1_power_modified_counter_values[8], !WE,  ,  , !H1_valid_wrreq,  ,  ,  ,  );


--H1_wrptr_g[9] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|wrptr_g[9]
H1_wrptr_g[9] = DFFEAS(M1_power_modified_counter_values[9], !WE,  ,  , !H1_valid_wrreq,  ,  ,  ,  );


--H1_wrptr_g[10] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|wrptr_g[10]
H1_wrptr_g[10] = DFFEAS(M1_power_modified_counter_values[10], !WE,  ,  , !H1_valid_wrreq,  ,  ,  ,  );


--R1_dffe9a[2] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|alt_synch_pipe_iv7:ws_dgrp|dffpipe_c09:dffpipe8|dffe9a[2]
R1_dffe9a[2] = DFFEAS(H1_rdptr_g[2], !WE,  ,  ,  ,  ,  ,  ,  );


--R1_dffe9a[4] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|alt_synch_pipe_iv7:ws_dgrp|dffpipe_c09:dffpipe8|dffe9a[4]
R1_dffe9a[4] = DFFEAS(H1_rdptr_g[4], !WE,  ,  ,  ,  ,  ,  ,  );


--M1_parity_ff is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|a_graycounter_ik6:wrptr_g1p|parity_ff
M1_parity_ff = DFFEAS(M1_parity, !WE,  ,  ,  ,  ,  ,  ,  );


--M1_parity is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|a_graycounter_ik6:wrptr_g1p|parity
M1_parity = H1_valid_wrreq & M1_parity_ff & VCC # !H1_valid_wrreq & !M1_parity_ff;

--M1L37 is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|a_graycounter_ik6:wrptr_g1p|parity~COUT
M1L37 = CARRY(!H1_valid_wrreq & !M1_parity_ff);


--M1_countera0 is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|a_graycounter_ik6:wrptr_g1p|countera0
M1_countera0 = H1_valid_wrreq & (M1_counter_ffa[0] # GND) # !H1_valid_wrreq & (M1L37 $ (GND # !M1_counter_ffa[0]));

--M1L14 is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|a_graycounter_ik6:wrptr_g1p|countera0~COUT
M1L14 = CARRY(H1_valid_wrreq # !M1L37);


--M1_countera1 is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|a_graycounter_ik6:wrptr_g1p|countera1
M1_countera1 = M1L14 & (M1_power_modified_counter_values[1] & VCC) # !M1L14 & (M1_counter_ffa[0] $ (!M1_power_modified_counter_values[1] & VCC));

--M1L16 is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|a_graycounter_ik6:wrptr_g1p|countera1~COUT
M1L16 = CARRY(M1_counter_ffa[0] & !M1L14);


--M1_countera2 is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|a_graycounter_ik6:wrptr_g1p|countera2
M1_countera2 = M1L16 & (M1_power_modified_counter_values[1] $ (M1_power_modified_counter_values[2] & VCC)) # !M1L16 & (M1_power_modified_counter_values[2] # GND);

--M1L18 is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|a_graycounter_ik6:wrptr_g1p|countera2~COUT
M1L18 = CARRY(M1_power_modified_counter_values[1] # !M1L16);


--M1_countera3 is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|a_graycounter_ik6:wrptr_g1p|countera3
M1_countera3 = M1L18 & (M1_power_modified_counter_values[3] & VCC) # !M1L18 & (M1_power_modified_counter_values[2] $ (M1_power_modified_counter_values[3] # GND));

--M1L20 is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|a_graycounter_ik6:wrptr_g1p|countera3~COUT
M1L20 = CARRY(!M1_power_modified_counter_values[2] & !M1L18);


--M1_countera4 is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|a_graycounter_ik6:wrptr_g1p|countera4
M1_countera4 = M1L20 & (M1_power_modified_counter_values[3] $ (M1_power_modified_counter_values[4] & VCC)) # !M1L20 & (M1_power_modified_counter_values[4] # GND);

--M1L22 is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|a_graycounter_ik6:wrptr_g1p|countera4~COUT
M1L22 = CARRY(M1_power_modified_counter_values[3] # !M1L20);


--R1_dffe9a[8] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|alt_synch_pipe_iv7:ws_dgrp|dffpipe_c09:dffpipe8|dffe9a[8]
R1_dffe9a[8] = DFFEAS(H1_rdptr_g[8], !WE,  ,  ,  ,  ,  ,  ,  );


--R1_dffe9a[10] is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dcfifo_fe71:auto_generated|alt_synch_pipe_iv7:ws_dgrp|dffpipe_c09:dffpipe8|dffe9a[10]
R1_dffe9a[10] = DFFEAS(H1_rdptr_g[10], !WE,  ,  ,  ,  ,  ,  ,  );


--M1_countera5 is FIFO_RDN_ByDSP:inst5|dcfifo:dcfifo_component|dc