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📄 fx2_to_extsyncfifo.lst

📁 CY7c68013 GPIF程序绝对可用
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C51 COMPILER V7.20   FX2_TO_EXTSYNCFIFO                                                    03/12/2008 15:34:04 PAGE 1   


C51 COMPILER V7.20, COMPILATION OF MODULE FX2_TO_EXTSYNCFIFO
OBJECT MODULE PLACED IN FX2_to_extsyncFIFO.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE FX2_to_extsyncFIFO.c DEBUG OBJECTEXTEND

line level    source

   1          //modfiy at 2005-1-7
   2          //with fpga 
   3          
   4          
   5          #pragma NOIV               // Do not generate interrupt vectors
   6          //-----------------------------------------------------------------------------
   7          //   File:       FX2_to_extsyncFIFO.c
   8          //   Contents:   Hooks required to implement FX2 GPIF to external sync. FIFO
   9          //               interface using CY4265-15AC
  10          //
  11          //   Copyright (c) 2003 Cypress Semiconductor, Inc. All rights reserved
  12          //-----------------------------------------------------------------------------
  13          #include "fx2.h"
  14          #include "fx2regs.h"
  15          #include "fx2sdly.h"            // SYNCDELAY macro, see Section 15.14 of FX2 Tech.
  16                                          // Ref. Manual for usage details.
  17          
  18          #define EXTFIFONOTFULL   GPIFREADYSTAT & bmBIT1
  19          #define EXTFIFONOTEMPTY  GPIFREADYSTAT & bmBIT0
  20          
  21          #define GPIFTRIGRD 4
  22          
  23          #define GPIF_EP2 0
  24          #define GPIF_EP4 1
  25          #define GPIF_EP6 2
  26          #define GPIF_EP8 3
  27          
  28          BYTE    Configuration;          // Current configuration
  29          BYTE    AlternateSetting;       // Alternate settings
  30          extern BOOL GotSUD;             // Received setup data flag
  31          extern BOOL Sleep;
  32          extern BOOL Rwuen;
  33          extern BOOL Selfpwr;
  34          
  35          BYTE Configuration;                 // Current configuration
  36          BYTE AlternateSetting;              // Alternate settings
  37          BOOL in_enable = FALSE;             // flag to enable IN transfers
  38          BOOL enum_high_speed = FALSE;       // flag to let firmware know FX2 enumerated at high speed
  39          
  40          
  41          //sbit Enable = IOA ^ 0;  //PIN 3
  42          //sbit DO = IOA ^ 1;   //PIN 6
  43          //sbit SK = IOA ^ 2;  //PIN 4   
  44          //sbit Rst= IOA^ 7;
  45          
  46          sbit nSTATUS=IOA^7;   //input
  47          sbit CONFIG_DONE=IOA^6; //input
  48          sbit nCONFIG=IOA^5;  //out
  49          sbit DCLK=IOA^4;    //out
  50          sbit DATA0=IOA^3;   //out
  51          sbit LEDIO=IOA^2;
  52          sbit DEVICE_STATE=IOA^1; //in 
  53          sbit AD_IRQ =IOA^0;
  54          //-----------------------------------------------------------------------------
  55          // Task Dispatcher hooks
C51 COMPILER V7.20   FX2_TO_EXTSYNCFIFO                                                    03/12/2008 15:34:04 PAGE 2   

  56          //   The following hooks are called by the task dispatcher.
  57          //-----------------------------------------------------------------------------
  58          void Setup_FLOWSTATE_Write ( void );
  59          void Setup_FLOWSTATE_Read ( void );
  60          void GpifInit ();
  61          
  62          void Delay(unsigned int n);
  63          //void Clock(void);
  64          void SendData(BYTE d);
  65          WORD ConfigNumb;
  66          WORD RxdCounter;
  67          BYTE TrigSite_H,TrigSite_L;
  68          BYTE cmd_buffer[8];
  69          BYTE rxd_len;
  70          static WORD xdata Tcount = 0;     // transaction count
  71          static WORD xFIFOBC_IN = 0x0000;  // variable that contains EP6FIFOBCH/L value
  72          
  73          void GPIF_SingleByteWrite (BYTE gdata)
  74          {
  75   1        while( !( GPIFTRIG & 0x80 ) )  // poll GPIFTRIG.7 Done bit
  76   1        {
  77   2           ;
  78   2        }
  79   1      
  80   1        XGPIFSGLDATLX = gdata;         // trigger GPIF Single Byte Write transaction
  81   1      }
  82          
  83          void WriteCMD_GPIF(BYTE * buf)
  84          {
  85   1      BYTE i;
  86   1         while(DEVICE_STATE);
  87   1                                       for(i=0;i<rxd_len;i++)
  88   1                             GPIF_SingleByteWrite(*(buf+i));
  89   1                         LEDIO=0;
  90   1                          // EZUSB_Delay(50);
  91   1                               LEDIO=1;
  92   1      
  93   1      }
  94          
  95          
  96          void int0_isr (void) interrupt 0
  97          { 
  98   1        EX0 = 0; 
  99   1        cmd_buffer[0]='P';
 100   1        WriteCMD_GPIF(cmd_buffer);
 101   1        in_enable = TRUE; 
 102   1         /*
 103   1          LEDIO=0;
 104   1          EZUSB_Delay(50);
 105   1          LEDIO=1;
 106   1      
 107   1               cmd_buffer[0]='R';
 108   1              WriteCMD_GPIF(cmd_buffer);
 109   1      
 110   1        
 111   1      
 112   1          LEDIO=0;
 113   1          EZUSB_Delay(50);
 114   1          LEDIO=1;
 115   1              EX0 = 1; */
 116   1      
 117   1      }
C51 COMPILER V7.20   FX2_TO_EXTSYNCFIFO                                                    03/12/2008 15:34:04 PAGE 3   

 118          
 119          
 120          void TD_Init(void)             // Called once at startup
 121          {
 122   1        // set the CPU clock to 48MHz
 123   1         CPUCS = ((CPUCS & ~bmCLKSPD) | bmCLKSPD1) ;
 124   1      
 125   1         // set the slave FIFO interface to 48MHz
 126   1        in_enable=0;
 127   1        rxd_len=0;
 128   1        cmd_buffer[0]=cmd_buffer[1]=cmd_buffer[2]=cmd_buffer[3]=cmd_buffer[4]=cmd_buffer[5]=cmd_buffer[6]=cmd_bu
             -ffer[7]=0;
 129   1      
 130   1        REVCTL = 0x02;     // REVCTL.1=1; use "dynamic OUT automaticity"
 131   1       
 132   1        EP1INCFG = 0x00;   // always not valid, bulk
 133   1        SYNCDELAY;
 134   1      
 135   1        EP2CFG = 0xA0;     // EP2OUT, bulk, size 512, 4x buffered
 136   1        SYNCDELAY;                    
 137   1        EP4CFG = 0x00;     // EP4 not valid
 138   1        SYNCDELAY;                    
 139   1        EP6CFG = 0xE0;     // EP6IN, bulk, size 512, 4x buffered
 140   1        SYNCDELAY;                    
 141   1        EP8CFG = 0x00;     // EP8 not valid
 142   1        SYNCDELAY;
 143   1      
 144   1        FIFORESET = 0x80;  // set NAKALL bit to NAK all transfers from host
 145   1        SYNCDELAY;
 146   1        FIFORESET = 0x02;  // reset EP2 FIFO
 147   1        SYNCDELAY;
 148   1        FIFORESET = 0x06;  // reset EP6 FIFO
 149   1        SYNCDELAY;
 150   1        FIFORESET = 0x00;  // clear NAKALL bit to resume normal operation
 151   1        SYNCDELAY;
 152   1      
 153   1        EP2FIFOCFG = 0x00; // allow core to see zero to one transition of auto out bit
 154   1        SYNCDELAY;
 155   1        //EP2FIFOCFG = 0x10; // auto out mode, disable PKTEND zero length send, byte ops
 156   1        SYNCDELAY;
 157   1        EP6FIFOCFG = 0x09; // auto in mode, disable PKTEND zero length send, word ops
 158   1        SYNCDELAY;
 159   1       
 160   1         
 161   1        EP6AUTOINLENH=0x02;
 162   1        SYNCDELAY;
 163   1        EP6AUTOINLENL=0x00;
 164   1        SYNCDELAY;
 165   1      
 166   1      
 167   1        GpifInit ();       // initialize GPIF registers  
 168   1       
 169   1       
 170   1        TrigSite_H=0x12;
 171   1        TrigSite_L=0x34;
 172   1      
 173   1        ConfigNumb=0;
 174   1        RxdCounter=0;
 175   1        OEA=0xFF;
 176   1        OEA=0xFF;
 177   1      
 178   1        nSTATUS=1;
C51 COMPILER V7.20   FX2_TO_EXTSYNCFIFO                                                    03/12/2008 15:34:04 PAGE 4   

 179   1        CONFIG_DONE=1;
 180   1        nCONFIG=1;
 181   1        DCLK=1;
 182   1        DATA0=1;
 183   1        
 184   1        LEDIO=0;
 185   1        EZUSB_Delay(10);
 186   1        LEDIO=1;
 187   1        EZUSB_Delay(10);
 188   1        
 189   1        
 190   1      }
 191          
 192          #define HPI_RDY       GPIFREADYSTAT & bmBIT0 // RDY0 
 193          
 194          void TD_Poll(void)
 195          { //  WORD i;
 196   1         // WORD count;
 197   1       /*
 198   1        if(!(EP2468STAT & bmEP2EMPTY))
 199   1        { // check EP2 EMPTY(busy) bit in EP2468STAT (SFR), core set's this bit when FIFO is empty
 200   1             count = (EP2BCH << 8) + EP2BCL;
 201   1             // for(i=0;i<count;i++)
 202   1              // SendData(*(EP2FIFOBUF+i));
 203   1                       //EZUSB_Delay(400);
 204   1               LEDIO=!LEDIO;
 205   1               EP2BCL = 0x80;          // re(arm) EP2OUT
 206   1         }*/
 207   1      if(!in_enable) return;
 208   1         if(!AD_IRQ)
 209   1          {
 210   2               //cmd_buffer[0]='P';
 211   2           //WriteCMD_GPIF(cmd_buffer);
 212   2              LEDIO=0;
 213   2          EZUSB_Delay(10);
 214   2              if(AD_IRQ)return;
 215   2                while( !( GPIFTRIG & 0x80 ) )  // poll GPIFTRIG.7 Done bit
 216   2                       {
 217   3                       ;
 218   3                       }
 219   2              
 220   2                        GPIFTCB3=0;
 221   2                    SYNCDELAY;
 222   2                GPIFTCB2=0;
 223   2                SYNCDELAY;
 224   2                    GPIFTCB1 = 0x4;//MSB(Tcount);           // setup transaction count with Tcount value     
 225   2                SYNCDELAY;
 226   2                GPIFTCB0 = 0x00;//LSB(Tcount);
 227   2                SYNCDELAY; 
 228   2                GPIFTRIG = GPIFTRIGRD | GPIF_EP6; // launch GPIF FIFO READ Transaction to EP6IN
 229   2                    SYNCDELAY;
 230   2                SYNCDELAY;
 231   2                        SYNCDELAY;
 232   2                    while( !( GPIFTRIG & 0x80 ) )     // poll GPIFTRIG.7 GPIF Done bit
 233   2                {
 234   3                  ;
 235   3                }
 236   2      
 237   2      
 238   2      
 239   2          LEDIO=1;
 240   2          EZUSB_Delay(10);
C51 COMPILER V7.20   FX2_TO_EXTSYNCFIFO                                                    03/12/2008 15:34:04 PAGE 5   

 241   2              cmd_buffer[0]='R';
 242   2              WriteCMD_GPIF(cmd_buffer);
 243   2      //      cmd_buffer[0]='R';
 244   2      //      WriteCMD_GPIF(cmd_buffer);
 245   2      
 246   2      }

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