📄 mx.c
字号:
moderegs[0x15]=p&0xff;moderegs[0x7]&=0xf7;moderegs[0x7]|=(p&0x100)>>5;moderegs[0x9]&=0xdf;moderegs[0x9]|=(p&0x200)>>4;/*moderegs[MXREG_SAVE(2)]&=0xfb;moderegs[MXREG_SAVE(2)]|=(p&0x400)>>7;*/moderegs[0x16]=moderegs[6]+1;}mx_is_linear=0;return ;}static int mx_setmode(int mode, int prv_mode){ unsigned char *moderegs; ModeTiming *modetiming; ModeInfo *modeinfo; if ((mode < G640x480x256 /*&& mode != G320x200x256*/) || mode == G720x348x2) { return __svgalib_vga_driverspecs.setmode(mode, prv_mode); } if (!mx_modeavailable(mode)) return 1; modeinfo = __svgalib_createModeInfoStructureForSvgalibMode(mode); modetiming = malloc(sizeof(ModeTiming)); if (__svgalib_getmodetiming(modetiming, modeinfo, cardspecs)) { free(modetiming); free(modeinfo); return 1; } moderegs = malloc(MX_TOTAL_REGS); mx_initializemode(moderegs, modetiming, modeinfo, mode); free(modetiming); __svgalib_setregs(moderegs); /* Set standard regs. */ mx_setregs(moderegs, mode); /* Set extended regs. */ free(moderegs); __svgalib_InitializeAcceleratorInterface(modeinfo); free(modeinfo); return 0;}/* Unlock chipset-specific registers */static void mx_unlock(void){ int vgaIOBase, temp; vgaIOBase = (inb(0x3CC) & 0x01) ? 0x3D0 : 0x3B0; outb(vgaIOBase + 4, 0x11); temp = inb(vgaIOBase + 5); outb(vgaIOBase + 5, temp & 0x7F); __svgalib_outCR(0x19, 0x88);}static void mx_lock(void){ int vgaIOBase, temp; vgaIOBase = (inb(0x3CC) & 0x01) ? 0x3D0 : 0x3B0; outb(vgaIOBase + 4, 0x11); temp = inb(vgaIOBase + 5); outb(vgaIOBase + 5, temp & 0x7F); __svgalib_outCR(0x19, 0x0);}/* Indentify chipset, initialize and return non-zero if detected */static int mx_test(void){ int i; i=(__svgalib_inCR(0xf2)<< 8) | __svgalib_inCR(0xf1); if((i&0xfff0)!=0x8620)return 0; mx_chiptype=-1; if((i&0xff)==0x25)mx_chiptype=MX86250; if((i&0xff)==0x26)mx_chiptype=MX86251; if(mx_chiptype>=0){ mx_init(0,0,0); return 1;}; return 0;}/* Set display start address (not for 16 color modes) *//* Cirrus supports any address in video memory (up to 2Mb) */static void mx_setdisplaystart(int address){ address=address >> 2; outw(CRT_IC, (address & 0x00FF00) | 0x0C); outw(CRT_IC, ((address & 0x00FF) << 8) | 0x0D); outw(CRT_IC, ((address & 0xFF0000) >> 8) | 0x21);}/* Set logical scanline length (usually multiple of 8) *//* Cirrus supports multiples of 8, up to 4088 */static void mx_setlogicalwidth(int width){ int i; int offset = width >> 3; __svgalib_outCR(0x13,offset&0xff); i=__svgalib_inCR(0x23); i&=0x3f; i|=(offset&0x300)>>2; __svgalib_outCR(0x23,i);}static int mx_linear(int op, int param){if (op==LINEAR_ENABLE || op==LINEAR_DISABLE){ mx_is_linear=1-mx_is_linear; return 0;}if (op==LINEAR_QUERY_BASE) return mx_linear_base;if (op == LINEAR_QUERY_RANGE || op == LINEAR_QUERY_GRANULARITY) return 0; /* No granularity or range. */ else return -1; /* Unknown function. */}static int mx_match_programmable_clock(int clock){return clock ;}static int mx_map_clock(int bpp, int clock){return clock ;}static int mx_map_horizontal_crtc(int bpp, int pixelclock, int htiming){return htiming;}/* Function table (exported) */DriverSpecs __svgalib_mx_driverspecs ={ mx_saveregs, mx_setregs, mx_unlock, mx_lock, mx_test, mx_init, mx_setpage, NULL, NULL, mx_setmode, mx_modeavailable, mx_setdisplaystart, mx_setlogicalwidth, mx_getmodeinfo, 0, /* old blit funcs */ 0, 0, 0, 0, 0, /* ext_set */ 0, /* accel */ mx_linear, 0, /* accelspecs, filled in during init. */ NULL, /* Emulation */};/* Initialize chipset (called after detection) */static int mx_init(int force, int par1, int par2){ unsigned long buf[64]; int found=0; int _ioperm=0; mx_unlock(); if (force) { mx_memory = par1; mx_chiptype = par2; } else { }; if(mx_memory==0)mx_memory=1024<<((__svgalib_inCR(0x57)>>3)& 3); if (getenv("IOPERM") == NULL) { _ioperm=1; if (iopl(3) < 0) { printf("svgalib: mx: cannot get I/O permissions\n"); exit(1); } } found=__svgalib_pci_find_vendor_vga(0x10d9,buf,0); if (_ioperm) iopl(0); mx_linear_base=0; if (!found){ mx_linear_base=buf[4]&0xffffff00; }; if (__svgalib_driver_report) { printf("Using MX driver, %iKB. ",mx_memory); switch(mx_chiptype){ case 1: printf("82651 chipset.\n"); break; case 0: printf("82650 chipset.\n"); break; default: printf("unknown chipset, using 82650.\n"); break; }; } switch(mx_chiptype){ case 1: SysControl=0x32; BankIdx=0x34; break; case 0: default: SysControl=0x25; BankIdx=0x2e; break; }; cardspecs = malloc(sizeof(CardSpecs)); cardspecs->videoMemory = mx_memory; cardspecs->maxPixelClock4bpp = 75000; cardspecs->maxPixelClock8bpp = 160000; cardspecs->maxPixelClock16bpp = 160000; cardspecs->maxPixelClock24bpp = 160000; cardspecs->maxPixelClock32bpp = 160000; cardspecs->flags = INTERLACE_DIVIDE_VERT | CLOCK_PROGRAMMABLE; cardspecs->maxHorizontalCrtc = 4088; cardspecs->maxPixelClock4bpp = 0; cardspecs->nClocks =0; cardspecs->mapClock = mx_map_clock; cardspecs->mapHorizontalCrtc = mx_map_horizontal_crtc; cardspecs->matchProgrammableClock=mx_match_programmable_clock; __svgalib_driverspecs = &__svgalib_mx_driverspecs; __svgalib_banked_mem_base=0xa0000; __svgalib_banked_mem_size=0x10000; __svgalib_linear_mem_base=mx_linear_base; __svgalib_linear_mem_size=mx_memory*0x400; return 0;}#define WITHIN(v,c1,c2) (((v) >= (c1)) && ((v) <= (c2)))static unsignedcomp_lmn(unsigned clock){ int n, m, l, f, b; double fvco; double fout; double fmax; double fref; double fvco_goal; fmax = 162000.0; fref = 28636.5; /* I'm not sure */ for (m = 1; m <= 30; m++) { for (l = 2; l >= 0; l--) { for (n = 6; n <= 127; n++) { fout = ((double)(n + 1) * fref)/((double)(m + 1) * (1 << l)); fvco_goal = (double)clock * (double)(1 << l); fvco = fout * (double)(1 << l); if (!WITHIN(fvco, 0.995*fvco_goal, 1.005*fvco_goal)) continue; if (!WITHIN(fvco, 32000.0, fmax)) continue; f=0; if((l==2)||(fvco>100000.0))f=1; b=0; if((fvco>150000.0))b=1; #if 0printf("clock=%i l=%i m=%i n=%i f=%i b=%i\n",clock,n,m,l,f,b);#endif if(l==2)l=3; return (n << 8) | m | (l << 5) | (f<<7) | (b<<15); } } }printf("MX driver: Can't do clock=%i\n",clock); return 0;}
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -