📄 et6000.c
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/* Write some et6000 specific registers. */ port_out(regs[EXT+11],SEG_SELECT); if(regs[EXT + 10]) /* I am using EXT+10 for linear */ outb(base1 | 0x13,regs[EXT + 10]); /* modes */ outb(base1 | 0x40,regs[EXT + 9]); /* Unprotect writing CRT reg 0x35 */ port_out(0x11,__svgalib_CRT_I); save = port_in(__svgalib_CRT_D); port_out(save &0x7F,__svgalib_CRT_D); /* Write extended CRT regs */ for(i = 0;i < 3;i++) { port_out(0x33 + i,__svgalib_CRT_I); port_out(regs[EXT + 3 + i],__svgalib_CRT_D); } port_out(0x3F,__svgalib_CRT_I); port_out(regs[EXT + 8],__svgalib_CRT_D); port_out(0x18,__svgalib_CRT_I); port_out(regs[EXT + 2],__svgalib_CRT_D); /* See saveregs for these registers. */ outb(base1 | 0x58,(vga_getcolors() == (1 << 16))? (regs[EXT] | 0x02): regs[EXT]); outb(base1 | 0x59,regs[EXT + 6]); outb(base1 | 0x57,((inb(base1 | 0x57) | ((regs[EXT + 5] & 0x20) >> 4)))); /* For True Color modes we must devide the MCLK by 3. */ outb(base1 | 0x42,regs[EXT + 1]); outb(base1 | 0x40,regs[EXT + 9]); /* Original value for reg 0x11. */ port_out(0x11,__svgalib_CRT_I); port_out(save,__svgalib_CRT_D); /* Write extended attribute register. */ port_in(__svgalib_IS1_R); /* Reset flip flop. Page 137 of et6000 chip */ __svgalib_delay(); /* manual. */ port_out(0x16,ATT_IW); __svgalib_delay(); port_out(regs[EXT + 12],ATT_IW); __svgalib_delay(); port_in(__svgalib_IS1_R); __svgalib_delay(); port_out(0x17,ATT_IW); __svgalib_delay(); port_out(regs[EXT + 7],ATT_IW); /* I don't have an external DAC so I didn't include the last 3 regs. */}static void et6000_unlock(void){ if(x3_8) outb(x3_8,0xa0); else printf("et6000_unlock called when et6000 was not initialized.\n");}static void et6000_lock(void){ if(x3_8) {#ifdef DB6K fprintf(outf,"Lock called\n"); fflush(outf);#endif return; /* et4000 does this, I don't know why! */ outb(x3_8,0); /* I think it is because we lose root */ } /* privalege after initialize and can */ else /* no longer unlock registers. */ printf("et6000_lock called when et6000 was not initialized.\n");}static int et6000_test(void){ if(et6000_chiptype) return(1); else { et6000_init(0,0,0); DPRT("In et6000 test\n"); if(et6000_chiptype) return(1); return(0); }}/* Routines needed for modline calculation. */static int et6000_map_clock(int bpp, int clock){ return(clock);}static int et6000_match_programable_clock(int clock){ return(clock);}static int et6000_map_horizontal_crtc(int bpp, int pixelclock, int htiming){ return(htiming);}/* End of modeline subroutines. */static int et6000_init(int force, int par1, int par2){ unsigned char mem_cfg_reg; unsigned long buf[64]; /* 256 bytes of the pci bus registers. */#ifdef DB6K#include <sys/stat.h> char dboutfile[30]; if(et6000_chiptype) return(1); sprintf(dboutfile,"D%ld.txt",time(NULL)); outf = fopen(dboutfile,"w"); if(!outf){ printf("Can't open a debug output file in et6000_init.\n"); exit(1); } else { fprintf(outf,"et6000 init entered.\n"); chmod(dboutfile,0666); }#endif if(et6000_chiptype) return(1); /* An attempt to reenter init. */ /* Check for ET6000 chiptype. */ /* Get PCI and VL configuration space. The VL bus has not been checked. */ /* I have a PCI bus. */ /* Test color mode or mono mode */ x3_4 = __svgalib_CRT_I; /* set in vga.c */ x3_5 = __svgalib_CRT_D; x3_a = __svgalib_IS1_R; if(__svgalib_CRT_I == 0x3d4) x3_8 = 0x3d8; else x3_8 = 0x3b8; if(iopl(3) == -1) { printf("No permission to use PCI ports.\n"); perror("PCI ports"); } et6000_linear_base = 0; if(__svgalib_pci_find_vendor_vga(0x100c,buf,0) == 0 && (buf[0] == 0x3208100c)) {DPRT("Found et6000\n"); et6000_chiptype = ET6000; /* Defined in vga.h */ } else {#ifdef DB6K fprintf(outf,"Can't ifnd et6000 chipset. buf[0] = 0x%8lx\n", (unsigned long) buf[0]);#endif return(0); } et6000_unlock(); /* Set key. */ mem_type = inb(0x3c2) & 1; /* 0 = DRAM, 1 = MDRAM */ base1 = buf[0x5] & ~0xFF; /* 14 hex. The start of confg. */ /* 3C2 is the input status register. It has ** things like the monitor ID and the video ** memory type. The two low order bits are ** both zero for DRAM and both 1 for MDRAM. ** Offset 0x45 is the memory configuration ** register which gives the memory size depending ** on the type. Aparently one can't have 1Mbyte ** of MDRAM. */ if(!pci59std) { /* Saving pcibus registers so they may be restored. */ pci40std = (unsigned char) buf[16] & 0xFF; pci42std = (unsigned char) ((buf[16] & 0xFF0000) >> 16); pci57std = (unsigned char) ((buf[21] & 0xFF000000) >> 24); pci58std = (unsigned char) buf[22] & 0xFF; pci59std = (unsigned char) ((buf[22] & 0xFF00) >> 8); } mem_cfg_reg = (unsigned char) ((buf[17] & 0xFF00) >> 8) & 3;#ifdef DB6K { int i; for(i = 0;i < 64;i+=4) fprintf(outf,"%08x %08lx %08lx %08lx %08lx\n", (i/4) << 4,buf[i+3],buf[i+2],buf[i+1],buf[i]); fprintf(outf,"\npci40std 0x%02x pci42std 0x%02x pci58std " "0x%02x pci59std 0x%02x\n",pci40std, pci42std,pci58std,pci59std); }#endif if(mem_type) { /* MDRAM type */ if(mem_cfg_reg == 1) et6000_memory = 4; /* 4 MBytes of MDRAM */ else et6000_memory = 2; /* 2 MBytes of MDRAM */ } else /* DRAM */ { if(mem_cfg_reg == 2) et6000_memory = 4; /* 4 MBytes of DRAM */ else if(mem_cfg_reg == 1) et6000_memory = 2; /* 2 MBytes of DRAM */ else et6000_memory = 1; /* 1 MByte or DRAM */ } et6000_linear_base = buf[4] & 0xff000000; __svgalib_linear_mem_size = et6000_memory*0x100000; __svgalib_linear_mem_base = et6000_linear_base; /* Banked memory is set in vga.c */ outb(base1 | 0x68,0xa); /* Set clocka */ outb(base1 | 0x69,0x24); outb(base1 | 0x69,0x21); if(__svgalib_driver_report) printf("Using Tseng ET6000 driver (%d MBytes %sDRAM)\n", et6000_memory,mem_type ? "M" : ""); __svgalib_driverspecs = &__svgalib_et6000_driverspecs; cardspecs = malloc(sizeof(CardSpecs)); cardspecs->videoMemory = et6000_memory << 10; cardspecs->maxPixelClock4bpp = 75000; cardspecs->maxPixelClock8bpp = 160000; cardspecs->maxPixelClock16bpp = 160000; cardspecs->maxPixelClock24bpp = 160000; cardspecs->maxPixelClock32bpp = 160000; cardspecs->flags = INTERLACE_DIVIDE_VERT | CLOCK_PROGRAMMABLE; cardspecs->maxHorizontalCrtc = 2040; cardspecs->nClocks = 0; cardspecs->clocks = NULL; cardspecs->mapClock = et6000_map_clock; cardspecs->matchProgrammableClock = et6000_match_programable_clock; cardspecs->mapHorizontalCrtc = et6000_map_horizontal_crtc; et6000_lock();#ifdef DBG { int i,*csp; fdm = fopen("regset.txt","w"); if(!fdm) { printf("Can't open register setting file.\n"); exit(1); } fprintf(fdm,"CardSpecs\n"); csp = (int* ) cardspecs; for(i = 1;i < 13; i++) { fprintf(fdm,"%d, ",*(csp+i)); if(i % 3 == 0) fprintf(fdm,"\n"); } fprintf(fdm,"videoMemory %d\n",cardspecs->videoMemory); }#endif /* DBG */ return(0);}static unsigned char last_page = 0;/* Bank switching function. Set 64k bank number. */static void et6000_setpage(int page){ /* Set both read and write bank. 3cd */ port_out(last_page = (page | ((page & 15) << 4)), SEG_SELECT); /* Write page4-5 to bits 0-1 of ext. bank register, */ /* and to bits 4-5. */ /* return; Testing */ outb(0x3cb, ((inb(0x3cb) & ~0x33) | (page >> 4) | (page & 0x30)));}static void et6000_setrdpage(int page){ DPRT("In setrdpage.\n"); last_page &= 0x0F; last_page |= (page << 4); port_out(last_page,SEG_SELECT); outb(0x3cb,(inb(0x3cb) & ~0x30) | (page & 0x30));}static void et6000_setwrpage(int page){ DPRT("In setwrpage"); last_page &= 0xF0; last_page |= (page | 0x0F); port_out(last_page,SEG_SELECT); outb(0x3cb,(inb(0x3cb) & ~0x03) | page >> 4);}static int et6000_setmode(int mode, int prv_mode){ unsigned char i,*moderegs; ModeTiming *modetiming; ModeInfo *modeinfo;#ifdef DB6K fprintf(outf,"In setmode, mode = %d, prv_mode = %d\n",mode,prv_mode); compareregs();#endif /* Standard dac behaviour */ switch (et6000_modeavailable(mode)) { case STDVGADRV: /* Reset extended register that is set to non-VGA */ /* compatible value for 132-column textmodes (at */ /* least on some cards). */DPRT("STDVGADRV\n"); et6000_unlock(); outb(__svgalib_CRT_I, 0x34); /* 3#4 */ i = inb(__svgalib_CRT_D); /* 3#5 */ if ((i & 0x02) == 0x02) /* Clock0 select bit 2 */ outb(__svgalib_CRT_D, (i & 0xFD)); /* Turn it off. */ /* Make sure pci bus is set right. */#ifdef DB6K fprintf(outf,"reg 42 = %2x 58 = %2x before.\n",inb(base1 | 0x42) ,inb(base1 | 0x58));#endif outb(base1 | 0x40,pci40std); outb(base1 | 0x42,pci42std); outb(base1 | 0x57,pci57std); outb(base1 | 0x58,pci58std); outb(base1 | 0x59,pci59std);#ifdef DB6K fprintf(outf,"pci42 = %2x, pci58 = %2x, pci59 = %2x\n",pci42std, pci58std,pci59std); fprintf(outf,"reg 42 = %2x after.\n",inb(base1 | 0x42));#endif return __svgalib_vga_driverspecs.setmode(mode, prv_mode);
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