et6000.c

linux 下svgalib编的一个界面程序示例

                       /*  ET6000 driver  Don Secrest  version 1.06     */
                       /*  version using svgalib_pci_find July 9 1999   */
#include <stdlib.h>    /*  Testing modeline update. */
#include <stdio.h>
#include <unistd.h>
#include <stdarg.h>
#include <errno.h>
#include <fcntl.h>
#include <sys/types.h>
#include "vga.h"
#include "libvga.h"
#include "driver.h"
#include <linux/pci.h>
#include "timing.h"
#include "interface.h"
#include "vgaregs.h"
#include "vgapci.h"

#ifdef DB6K
#include <time.h>
FILE *outf;
static int compareregs(void);
static int textset = 0;
static void prtmodeinfo(vga_modeinfo *m);
static char *not_written = "ET6000 subroutine %s is not written yet.\n";
static unsigned char *textstore = 0;
static unsigned char *vgatextstore = 0;
void fdumpregs(FILE *fd,unsigned char regs[],int n);
#define DNOTW(a) fprintf(outf,not_written,a)
#define DPRT(a) fprintf(outf,a)
#else
#define DNOTW(a)
#define DPRT(a)
#endif  /* DB6K */

#ifdef DBG  /* DBG is for debugging the code to use modelines. */
FILE *fdm;
#endif

#define SEG_SELECT 0x3CD

static unsigned long base1;

/* The following are set by init so that they may be restored to their  */
/* state in setmode.                                                    */
static unsigned char pci40std,pci42std,pci57std,pci58std,pci59std=0;

#define LMODEMIN 9    /* No mode below this has been tested for linear    */
#define LMODEMAX 146  /* No mode above this tested.  These should change. */

static long et6000_mapped_mem = 0;

static CardSpecs *cardspecs;
static int et6ksav = VGA_MISCOUTPUT + 1;
static int ET6000_TOTAL_REGS = VGA_MISCOUTPUT + 14;
static char mem_type;
static int et6000_memory;
static int et6000_linear_base;
static int et6000_interlaced(int mode);
static unsigned comp_lmn(unsigned clock,float fac);
static int et6000_chiptype = 0;
static int x3_4,x3_5,x3_8 = 0,x3_a; /* On init these get set according */
				    /*  to color */
union longword {
  unsigned char b[4];
  unsigned short w[2];
  unsigned long l;
};

/* The following are in the order of apearance in struct DriverSpecs as are */
/* the program entries.                                                     */

static int  et6000_saveregs(unsigned char regs[]);
static void et6000_setregs(const unsigned char regs[], int mode);
static void et6000_unlock(void);
static void et6000_lock(void);
static int  et6000_test(void);
static int  et6000_init(int force, int par1, int par2);
static void et6000_setpage(int page);
static void et6000_setrdpage(int page);
static void et6000_setwrpage(int page);
static int  et6000_setmode(int mode, int prv_mode);
static int  et6000_modeavailable(int mode);
static void et6000_setdisplaystart(int address);
static void et6000_setlogicalwidth(int width);
static void et6000_getmodeinfo(int mode,vga_modeinfo *modeinfo);
/* Obsolete blit functions left out here. */
static int  et6000_ext_set(unsigned what, va_list params);
static int  et6000_accel(unsigned operation, va_list params);
static int  et6000_linear(int op, int param);

/*
** End of the DriverSpecs function declarations         
*/

/* Function table (exported) */

DriverSpecs __svgalib_et6000_driverspecs =
{
    et6000_saveregs,
    et6000_setregs,
    et6000_unlock,
    et6000_lock,
    et6000_test,
    et6000_init,
    et6000_setpage,
    et6000_setrdpage,
    et6000_setwrpage,
    et6000_setmode,
    et6000_modeavailable,
    et6000_setdisplaystart,
    et6000_setlogicalwidth,
    et6000_getmodeinfo,
    0,				/* bitblt */
    0,				/* imageblt */
    0,				/* fillblt */
    0,				/* hlinelistblt */
    0,				/* bltwait */
    et6000_ext_set,
    et6000_accel,
    et6000_linear,
    NULL,			/* accelspecs */
    NULL,			/* emulation */
};
#ifdef DBG
/* programs to debug the modeline stuff. */
static void pmodeinfo(ModeInfo *In)
{
  fprintf(fdm,"Modeinfo\nWidth %d  height %d\n",In->width,In->height);
  fprintf(fdm,"Bpp %d,  bpp %d,  cB %d\n",In->bytesPerPixel,In->bitsPerPixel,
	 In->colorBits);
  fprintf(fdm,"RGB %d,  %d,  %d\n",In->redWeight,In->greenWeight,
	  In->blueWeight);
  fprintf(fdm,"Offset RGB %d,  %d,  %d\n",In->redOffset,In->greenOffset,
	  In->blueOffset);
  fprintf(fdm,"Line width %d,  real width %d,  real height %d\n",In->lineWidth,
	  In->realWidth,In->realHeight);
}
static void pmodetiming(ModeTiming *Tg)
{
  int i,*mt;
  mt = (int *) Tg;
  fprintf(fdm,"Mode timing\n");
  for(i = 0;i < 20;i++)
    {
      fprintf(fdm,"0x%04x  ",*(mt + i));
	if((i+1)%5 == 0) fprintf(fdm,"\n");
    }
}
#endif  /* Modeline routine debug. */

static void et6000_initializemode(unsigned char *moderegs, 
				  ModeTiming *modetiming,ModeInfo *modeinfo,
				  int mode)
{
  int tmp,tmptot,tmpss,tmpse,tmpbs,tmpbe,offset,i;
  float fac;

  fac = 1.0;
  __svgalib_setup_VGA_registers(moderegs,modetiming,modeinfo);
  offset = modeinfo->lineWidth >>3;
  if(modetiming->flags & DOUBLESCAN)
    moderegs[VGA_CR17] = 0xa3;
  else
    moderegs[VGA_CR17] = 0xab;
  if((modeinfo->bytesPerPixel == 2) || (modetiming->flags & DOUBLESCAN))
      moderegs[VGA_CR14] = 0x40;
  else
      moderegs[VGA_CR14] = 0x60;
  moderegs[VGA_CR13] = offset & 0xff;
  moderegs[VGA_AR10] = 0x01;     /* This is correct. May 20 1999 */
  moderegs[VGA_AR11] = 0x00;
  for(i = 0;i < 13;i++)
    moderegs[et6ksav + i] = 0x00;

  tmp    = (modetiming->CrtcHDisplay >> 3) - 1;
  tmptot = (modetiming->CrtcHTotal >> 3) -5;
  tmpss  = (modetiming->CrtcHSyncStart >> 3);
  tmpbs  = (modetiming->CrtcHSyncStart >> 3) - 1;
  tmpse  = offset;                                 /*    3F      */
  moderegs[et6ksav+8] = ((tmptot & 0x100) >> 8) |  /* 0 Htot (8) */
                        ((tmp  &  0x100)  >> 7) |  /* 1 HDsp (8) */
                        ((tmpbs &  0x100) >> 6) |  /* 2 HBs  (8) */
                        ((tmpss &  0x100) >> 4) |  /* 4 HSs  (8) */
                        ((tmpse &  0x200) >> 3) |  /* 6 offs (9) */
                        ((tmpse &  0x100) >> 1);   /* 7 ofss (8) */
  tmp    = modetiming->CrtcVDisplay -1;
  tmptot = modetiming->CrtcVTotal - 2;
  tmpbs  = modetiming->CrtcVSyncStart -1;
  tmpss  = modetiming->CrtcVSyncStart;
  tmpbe  = 0x00;  /* (10) */                        /*     35      */
  moderegs[et6ksav+5] = ((tmpbs & 0x400)  >> 10) |   /* 0 VBs  (10) */
                        ((tmptot & 0x400) >> 9 ) |   /* 1 Vtot (10) */
                        ((tmp   &  0x400) >> 8 ) |   /* 2 VDsp (10) */
                        ((tmpss &  0x400) >> 7 ) |   /* 3 Vsst (10) */
                        ( tmpbe >> 6);               /* 4 splt (10) */
  if(modetiming->flags & INTERLACED)
    moderegs[et6ksav + 5] |= 0xa0;  /* bit 7 of cr35 and bit 1 of 57 */

  switch(modeinfo->bitsPerPixel)
  {
  case 8:
    moderegs[et6ksav + 12] = 0x00;        /* et6ksav   Reg   */
    moderegs[et6ksav +  6] = 0x04;        /*    0     PCI 58 */
    moderegs[et6ksav] &= 0xfe;            /*    1     PCI 42 */
    break;                                /*    2     CR18   */
  case 15:                                /*    3     CR33   */
  case 16:                                /*    4     CR34   */
    moderegs[et6ksav + 12] = 0x90;        /*    5     CR35   */
    moderegs[et6ksav +  6] = 0x08;        /*    6     PCI 59 */
    if(modeinfo->greenWeight == 5)        /*    7     AR17   */
      moderegs[et6ksav] = 0x00;           /*    8     CR3F   */
    else                                  /*    9     PCI 40 */
      moderegs[et6ksav] = 0x02;           /*   10     PCI 13 */
    break;                                /*   11     3CD    */
  case 24:                                /*   12     AR16   */
    moderegs[et6ksav + 12] = 0xa0;
    moderegs[et6ksav  + 9] = 0x06;
    moderegs[et6ksav  + 6] = 0x02;
    moderegs[et6ksav  + 2] = 0xff;
    moderegs[et6ksav  + 1] = 0x02;
    fac = 3.0;
    break;
  case 32:
    moderegs[et6ksav + 12] = 0xb0;
    moderegs[et6ksav  + 9] = 0x06;
    moderegs[et6ksav +  6] = 0x02;
    moderegs[et6ksav  + 2] = 0xff;
    moderegs[et6ksav +  1] = 0x03;
    fac = 4.0;
    break;
  default:
    moderegs[et6ksav + 12] = 0x00;
    moderegs[et6ksav +  6] = 0x04;
    moderegs[et6ksav] &= 0xfe;
    break;
  }

  modetiming->selectedClockNo=6; /* use clock 6 */

  if(modetiming->selectedClockNo > 3)
    moderegs[et6ksav + 4] |= 2;
  moderegs[VGA_MISCOUTPUT] = (moderegs[VGA_MISCOUTPUT] & 0xf3) |
                             ((modetiming->selectedClockNo & 0x03) << 2);
   tmp=comp_lmn(modetiming->pixelClock,fac);
   outb(base1 | 0x68,6);    
   outb(base1 | 0x69,tmp&0xff);
   outb(base1 | 0x69,tmp>>8);
  /* because timing is giving the wrong */
  /* clock. FIX THIS WHEN CLOCK IS OK.  */
}

static int  et6000_saveregs(unsigned char regs[]) /* Called frm vga_saveregs */
{
  int i;

  et6000_unlock();
#ifdef DB6K
  { 
    fprintf(outf,"In saveregs, regs at %x\n",(int) regs);
    fflush(outf);
  }
#endif
  /* Save extended CRT registers. */
  for(i = 0; i < 3;i++) {
    port_out(0x33 + i,__svgalib_CRT_I);
                                /* regs 30 and 31 are readonly and no 32   */
    regs[EXT + 3 + i] = port_in(__svgalib_CRT_D);
                                        /* 36h and 37 do not exist on et6k */
  }
  port_out(0x3f,__svgalib_CRT_I);
  regs[EXT + 8] = port_in(__svgalib_CRT_D);
  port_out(0x18,__svgalib_CRT_I);
  regs[EXT + 2] = port_in(__svgalib_CRT_D);
                                        /* ET6000 only.               */
  /* Extended sequencer register 7 in EXT+9 doesen't exist on et6000. */
  /* Also EXT+10 doesn't exist. There is no 0x3c3 on et6000.          */
  regs[EXT + 11] = port_in(SEG_SELECT);
  regs[EXT + 10] = inb(base1 | 0x13);  /* I am using EXT+10 for the   */
                                       /* linear map map location.    */
                                   /* Reset flip flop. Page 137       */
                                   /* of the et6000 manual. These two */
                                   /* regs 10 & 11 are 0 for linear.  */
  regs[EXT] = inb(base1 | 0x58);   /* Offset 58 describes 16bpp       */
  regs[EXT + 6] = inb(base1 | 0x59); /* bit1 = 0  555 RGB             */
                                     /*        1  565 RGB             */
                                   /* Offset 59 bits <32> set bpp.    */
                                   /* ---------------------           */
                                   /* | 3 | 2 |           |           */
                                   /* =====================           */
                                   /* | 0 | 0 | 24    bpp |           */
                                   /* | 0 | 1 |  8    bpp |           */
                                   /* | 1 | 0 | 15/16 bpp |           */
  port_in(__svgalib_IS1_R);        /* ---------------------           */
  __svgalib_delay();                   
  port_out(0x16,ATT_IW);           
  __svgalib_delay();
  regs[EXT + 12] = port_in(ATT_R); 
  __svgalib_delay();
  port_in(__svgalib_IS1_R);
  __svgalib_delay();
  port_out(0x17,ATT_IW);
  __svgalib_delay();
  regs[EXT + 7] = port_in(ATT_R);
  port_out(0x06,SEQ_I);
  regs[EXT + 5] = ((inb(base1 | 0x57) & 2) << 4); /* bit 1 of 57 to bit5  */
  regs[EXT + 9] = inb(base1 | 0x40);   /* Sets memory mapping.            */
  regs[EXT + 1] = inb(base1 | 0x42);   /* Saved for future use.           */
  return(13);                          /* ET6000 requires 13 EXT regs.    */
                                       /* We may find that it needs more! */
}

/* Set chipset-specific registers */

static void et6000_setregs(const unsigned char regs[], int mode)
{
  int i;
  unsigned char save;
  et6000_linear(LINEAR_DISABLE,0);  /* Turn off linear. */
#ifdef DB6K
  fprintf(outf,"In setregs for regs at %x, mode = %d\n",(int) regs,mode);
  fflush(outf);
  /* return;       Testing */
#endif

  et6000_unlock();