et4000.regs

linux 下svgalib编的一个界面程序示例

/* ET4000 registers from SVGALIB 0.81 */

/* Define DAC_TYPE to force the DAC type used in the ET4000 driver. If it   */
/* is not defined, the driver tries to autodetect the DAC type which may go */
/* wrong. */

/*  Use the following values:
	0: Ordinary DAC
	1: Sierra SC11486 (32k)
	3: Sierra 32k/64k
 	5: SS2410 15/24bit DAC
 	9: AT&T 20c491/2 (32k/64k/24bit)
	17: Acumos ADAC (Cirrus Logic DAC)
	33: Sierra 15025/6 24-bit DAC
*/

#define DAC_TYPE 0

/* unsupported modes */
#define g320x200x64K_regs  DISABLE_MODE
#define g320x200x16M_regs  DISABLE_MODE
#define g800x600x16_regs   DISABLE_MODE
#define g1024x768x16_regs  DISABLE_MODE
#define g1280x1024x16_regs DISABLE_MODE


/* Got this mode from someone's tseng3.exe dump. */
/* ET4000 HiColor BIOS mode 0x13 -- 320x200x32K */
/* Video timing:	Vertical frequency   : 70.3Hz
			Horizontal frequency : 31.6KHz  */
static unsigned char g320x200x32K_regs[73] = {
  0x5F,0x4F,0x50,0x82,0x54,0x80,0xBF,0x1F,0x00,0x41,0x00,0x00,
  0x00,0x00,0x00,0x00,0x9C,0x8E,0x8F,0x50,0x60,0x96,0xB9,0xAB,
  0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,
  0x0C,0x0D,0x0E,0x0F,0x01,0x00,0x0F,0x00,0x00,
  0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,0xFF,
  0x03,0x01,0x0F,0x00,0x0E,
  0x63,
  0x00,0x00,0x28,0x00,0x08,0x00,0x43,0x0F,0x00,0xFC,0x00,0x00,
  0x00
};

/* ET4000 BIOS mode 2Eh - 640x480x256 */
static unsigned char g640x480x256_regs[73] = {
  0x5F,0x4F,0x50,0x82,0x54,0x80,0x0B,0x3E,0x00,0x40,0x00,0x00,
  0x00,0x00,0x00,0x00,0xEA,0x8C,0xDF,0x50,0x60,0xE7,0x04,0xAB,
  0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,
  0x0C,0x0D,0x0E,0x0F,0x01,0x00,0x0F,0x00,0x00,
  0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,0xFF,
  0x03,0x01,0x0F,0x00,0x0E,
  0xE3,
  0x00,0x00,0x28,0x00,0x08,0x00,0x03,0x0F,0x00,0xFC,0x00,0x00,
  0x00
};

/* ET4000 BIOS mode 30h - 800x600x256 */
static unsigned char g800x600x256_regs[73] = {
  0x7F,0x63,0x64,0x02,0x6A,0x1D,0x77,0xF0,0x00,0x60,0x00,0x00,
  0x00,0x00,0x00,0x00,0x5D,0x8F,0x57,0x64,0x60,0x5B,0x74,0xAB,
  0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,
  0x0C,0x0D,0x0E,0x0F,0x01,0x00,0x0F,0x00,0x00,
  0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,0xFF,
  0x03,0x01,0x0F,0x00,0x0E,
  0xE3,
  0x00,0x00,0x28,0x00,0x0A,0x00,0x03,0x0F,0x00,0xFC,0x00,0x00,
  0x00
};

/* ET4000 BIOS mode 38h - 1024x768x256 */
static unsigned char g1024x768x256_regs[73] = {
  0xA1,0x7F,0x80,0x04,0x89,0x99,0x26,0xFD,0x00,0x60,0x00,0x00,
  0x00,0x00,0x00,0x00,0x08,0x8A,0xFF,0x80,0x60,0x04,0x22,0xAB,
  0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,
  0x0C,0x0D,0x0E,0x0F,0x01,0x00,0x0F,0x00,0x00,
  0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,0xFF,
  0x03,0x01,0x0F,0x00,0x0E,
  0xEB,
  0x00,0x00,0x28,0x00,0x08,0x00,0x03,0x0F,0x00,0xBC,0x00,0x00,
  0x00
};

static unsigned char g800x600x32K_regs[73] = {
  0xF9,0xC7,0xC9,0x9B,0xCF,0x8F,0x78,0xF0,0x00,0x60,0x00,0x00,
  0x00,0x00,0x00,0x00,0x5C,0x8E,0x57,0xC8,0x60,0x5B,0x75,0xAB,
  0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,
  0x0C,0x0D,0x0E,0x0F,0x01,0x00,0x0F,0x00,0x00,
  0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,0xFF,
  0x03,0x01,0x0F,0x00,0x0E,
  0xEF,
  0x00,0x00,0x28,0x00,0x08,0x00,0x03,0x0F,0x00,0xBC,0x00,0x00,
  0x06
};
#define g800x600x64K_regs g800x600x32K_regs

static unsigned char g640x480x16M_regs[73] = {
  0x27,0xEF,0xF2,0x88,0xF8,0x98,0x0B,0x3E,0x00,0x40,0x00,0x00,
  0x00,0x00,0x00,0x00,0xEA,0x0C,0xDF,0xF0,0x60,0xE7,0x04,0xAB,
  0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,
  0x0C,0x0D,0x0E,0x0F,0x01,0x00,0x0F,0x00,0x00,
  0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,0xFF,
  0x03,0x01,0x0F,0x00,0x0E,
  0xEF,
  0x00,0x00,0x28,0x00,0x0A,0x00,0x03,0x0F,0x01,0xBC,0x00,0x00,
  0x00
};

static unsigned char g640x480x32K_regs[73] = {
  0xC3,0x9F,0xA1,0x85,0xA7,0x1F,0x0B,0x3E,0x00,0x40,0x00,0x00,
  0x00,0x00,0x00,0x00,0xEA,0x8C,0xDF,0xA0,0x60,0xE7,0x04,0xAB,
  0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,
  0x0C,0x0D,0x0E,0x0F,0x01,0x00,0x0F,0x00,0x00,
  0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,0xFF,
  0x03,0x01,0x0F,0x00,0x0E,
  0xE3,
  0x00,0x00,0x28,0x00,0x08,0x00,0x03,0x0F,0x00,0xBC,0x00,0x00,
  0x00
};
#define g640x480x64K_regs g640x480x32K_regs