cirrus.regs

linux 下svgalib编的一个界面程序示例

/* VGAlib version 1.2 - (c) 1993 Tommy Frandsen                    */
/*                                                                 */
/* This library is free software; you can redistribute it and/or   */
/* modify it without any restrictions. This library is distributed */
/* in the hope that it will be useful, but without any warranty.   */

/* Multi-chipset support Copyright 1993 Harm Hanemaayer */

/* These are the fixed SVGA-derived 320x200x256 registers that allow for */
/* full video memory utilitization (e.g. page-flipping). */
static unsigned char g320x200x256_regs[95] =
{
	/* CRTC */
  0x2D, 0x27, 0x2A, 0x8F, 0x2B, 0x8F, 0xC0, 0x1F, 0x00, 0xc0, 0x00, 0x00,
  0x00, 0x00, 0x00, 0x00, 0x98, 0x2C, 0x8F, 0x28, 0x00, 0x98, 0x99, 0xC3,
	/* ATC */
  0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B,
    0x0C, 0x0D, 0x0E, 0x0F, 0x41, 0xFF, 0x0F, 0x00, 0x00,
	/* Graphics */
    0x0F, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, 0xFF,
	/* Sequencer */
    0x03, 0x01, 0x0F, 0x00, 0x0E,
	/* Misc. Output */
    0x6F,
	/* Extended CRTC */
    0xFF, 0x00, 0x00, 0x22,
	/* Extended Graphics */
    0x00, 0x00, 0x00,
	/* Extended Sequencer */
  0x0F, 0x12, 0x01, 0x80, 0x0C, 0x19, 0x4A, 0x5B, 0x45, 0x25, 0xB0, 0x00,
  0x00, 0x00, 0x00, 0x00, 0x00, 0xD8, 0x00, 0x00, 0x01, 0x00, 0x2B, 0x2F,
    0x30, 0x2b, 0x1c,
	/* Cirrus DAC */
    0x00
};

static const unsigned char g640x480x256_regs[95] =
{
	/* CRTC */
  0x5F, 0x4F, 0x50, 0x82, 0x54, 0x80, 0x0B, 0x3E, 0x00, 0x40, 0x00, 0x00,
  0x00, 0x00, 0x00, 0x00, 0xEA, 0x8C, 0xDF, 0x50, 0x60, 0xE7, 0x04, 0xAB,
	/* ATC */
  0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B,
    0x0C, 0x0D, 0x0E, 0x0F, 0x01, 0x00, 0x0F, 0x00, 0x00,
	/* Graphics */
    0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, 0xFF,
	/* Sequencer */
    0x03, 0x01, 0x0F, 0x00, 0x0E,
	/* misc. output */
    0xe3,			/* use standard VGA dot clock 25 MHz */
	/* extra CRT registers: */
    0x00, 0x00, 0x00,
    0x22,			/* bit 4 is high bit of scanline length */
	/* extra graphics registers: */
    0x00, 0x00, 0x00,
	/* extra sequencer registers: */
    0x0f, 0x12,
    0x01,			/* (0x07) indicates number of colors */
    0x80,
    0x01,			/* (0x09) bits 2-4: monitor type */
    0x19, 0x4a, 0x5b, 0x45,
    0x4a,			/* (0x0e) dot clock */
    0x30,			/* (0x0f) bits 3-4: active video memory?, bit 7: use 2Mb */
    0x00, 0x00,
    0x00, 0x00, 0x00, 0x00,
    0xd8,			/* 'Performance Tuning Register', default is 0xd8. */
		/* 0xd8 = 11011000      write delay = 3, I/O delay = 2 */
		/* 0xc8 = 11001000      write delay = 2, I/O delay = 2 */
    0x00, 0x00, 0x01, 0x00, 0x2b, 0x2f, 0x30,
    0x2b,			/* (0x1e) dot clock */
    0x1c,			/* Internal memory clock. Not changed. */
    0x00			/* Hicolor DAC */
};

static const unsigned char g640x480x32K_regs[95] =
{
	/* CRTC */
  0x5F, 0x4F, 0x50, 0x82, 0x54, 0x80, 0x0B, 0x3E, 0x00, 0x40, 0x00, 0x00,
    0x00, 0x00, 0x00, 0x00, 0xEA, 0x8C, 0xDF,
    0xa0,			/* (0x13) bytes in scanline (was 0x50) */
    0x60, 0xE7, 0x04, 0xAB,
	/* ATC */
  0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B,
    0x0C, 0x0D, 0x0E, 0x0F, 0x01, 0x00, 0x0F, 0x00, 0x00,
	/* Graphics */
    0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x07, 0x0F, 0xFF,
	/* Sequencer */
    0x03, 0x01, 0x0F, 0x00, 0x0E,
	/* misc. output */
    0xEF,			/* use VLCK3 (was 0xE3: VGA 25Mhz) */
	/* extra CRT registers: */
    0x00, 0x00, 0x00,
    0x22,			/* bit 0: ?; bit 2: ? (frame); bit 6: wrap at 256K */
	/* extra graphics registers: */
    0x20, 0x00, 0x00,
	/* extra sequencer registers: */
    0x0f, 0x12,
    0x03,			/* (0x07) indicates number of colors */
    0x80,
    0x0d,			/* (0x09) bits 2-4: monitor type */
    0x19, 0x4a, 0x5b, 0x45,
    0x65,			/* (0x0e) dot clock (bytes): 49.87 MHz */
    0x30,			/* (0x0f) bits 3-4: active video memory?, bit 7: use 2Mb */
    0x00, 0x00,
  0x00, 0x00, 0x00, 0x00, 0xd8, 0x00, 0x00, 0x01, 0x00, 0x2b, 0x2f, 0x30,
    0x3a,			/* (0x1e) dot clock */
    0x1c,
    0xf0			/* Hicolor DAC */
};

static const unsigned char g640x480x16M_regs[95] =
{
	/* CRTC */
  0x5F, 0x4F, 0x50, 0x82, 0x54, 0x80, 0x0B, 0x3E, 0x00, 0x40, 0x00, 0x00,
    0x00, 0x00, 0x00, 0x00, 0xEA, 0x8C, 0xDF,
    0xf0,			/* (0x13) bytes in scanline / 8 */
    0x60, 0xE7, 0x04, 0xAB,
	/* ATC */
  0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B,
    0x0C, 0x0D, 0x0E, 0x0F, 0x01, 0x00, 0x0F, 0x00, 0x00,
	/* Graphics */
    0x00, 0x00, 0x00, 0x00, 0x00,
    0x00,			/* 0x40 for other modes */
    0x05,
    0x0F, 0xFF,
	/* Sequencer */
    0x03, 0x01, 0x0F, 0x00, 0x0E,
	/* misc. output */
    0xEF,			/* use VLCK3 (was 0xE3: VGA 25Mhz) */
	/* extra CRT registers: */
    0x00, 0x00, 0x00,
    0x22,			/* bit 0: ?; bit 2: ? (frame); bit 6: wrap at 256K */
	/* extra graphics registers: */
    0x20, 0x00, 0x00,
	/* extra sequencer registers: */
    0x0f, 0x12,
    0x05,			/* (0x07) indicates number of colors */
    0x80,
    0x0d,			/* (0x09) bits 2-4: monitor type */
    0x19, 0x4a, 0x5b, 0x45,
    0x3a,			/* (0x0e) dot clock (bytes): 75 MHz */
    0x30,			/* (0x0f) bits 3-4: active video memory?, bit 7: use 2Mb */
    0x00, 0x00,
    0x00, 0x00, 0x00, 0x00,
    0xdd,			/* 0xd8 for other modes */
    0x00, 0x00, 0x01, 0x00, 0x2b, 0x2f, 0x30,
    0x16,			/* (0x1e) dot clock */
    0x1c,
    0xe5			/* Hicolor DAC */
};

static const unsigned char g800x600x256_regs[95] =
{
	/* CRTC */
  0x7b, 0x63, 0x64, 0x9e, 0x69, 0x92, 0x6f, 0xf0, 0x00, 0x60, 0x00, 0x00,
  0x00, 0x00, 0x02, 0xbc, 0x58, 0x8a, 0x57, 0x64, 0x00, 0x58, 0x6f, 0xe3,
	/* ATC */
  0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B,
    0x0C, 0x0D, 0x0E, 0x0F, 0x01, 0x00, 0x0F, 0x00, 0x00,
	/* Graphics */
    0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, 0xFF,
	/* Sequencer */
    0x03, 0x01, 0x0F, 0x00, 0x0E,
	/* misc. output */
    0x2f,
	/* extra CRT registers: */
    0xff,
    0x00,			/* interlaced: CR0 / 2? */
    0x00,			/* sync overflow bits; bit 0 set for interlaced */
    0x22,			/* note: bit 4 is high bit of logical scanline length */
	/* extra graphics registers: */
    0x00, 0x00, 0x00,
	/* extra sequencer registers: */
    0x0f, 0x12, 0x01, 0x80,
    0x05,			/* (0x09) monitor type */
    0x19, 0x4a, 0x5b, 0x45,
    0x7e,			/* (0x0e) dot clock: 36 MHz */
    0x30, 0x00, 0x00,
  0x00, 0x00, 0x00, 0x00, 0xd8, 0x00, 0x00, 0x01, 0x00, 0x2b, 0x2f, 0x30,
    0x33,			/* (0x1e) dot clock */
    0x1c,
    0x00			/* Hicolor DAC */
};

static const unsigned char g800x600x16_regs[95] =
{
	/* CRTC */
  0x7b, 0x63, 0x64, 0x9e, 0x69, 0x92, 0x6f, 0xf0, 0x00, 0x60, 0x00, 0x00,
  0x00, 0x00, 0x02, 0xc8, 0x58, 0x8a, 0x57, 0x32, 0x00, 0x58, 0x6f, 0xe3,
	/* ATC */
  0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B,
    0x0C, 0x0D, 0x0E, 0x0F, 0x01, 0x00, 0x0F, 0x00, 0x00,
	/* Graphics */
    0x00, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0F, 0xFF,
	/* Sequencer */
    0x03, 0x01, 0x0F, 0x00, 0x06,
	/* misc. output */
    0x2f,
	/* extra CRT registers: */
    0xff, 0x00, 0x00, 0x22,
	/* extra graphics registers: */
    0x00, 0x00, 0x00,
	/* extra sequencer registers: */
  0x0f, 0x12, 0x00, 0x80, 0x05, 0x19, 0x4a, 0x5b, 0x45, 0x7e, 0x10, 0x00,
  0x00, 0x00, 0x00, 0x00, 0x00, 0xd8, 0x00, 0x00, 0x01, 0x00, 0x2b, 0x2f,
    0x30, 0x33, 0x1c,
	/* Hicolor DAC */
    0x00
};

/* Interlaced. */
static const unsigned char g1024x768x16i_regs[95] =
{
	/* CRTC */
  0x99, 0x7f, 0x80, 0x9c, 0x83, 0x19, 0x96, 0x1f, 0x00, 0x40, 0x00, 0x00,
  0x00, 0x00, 0x01, 0x00, 0x80, 0x84, 0x7f, 0x40, 0x00, 0x80, 0x96, 0xe3,
	/* ATC */
  0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B,
    0x0C, 0x0D, 0x0E, 0x0F, 0x01, 0x00, 0x0F, 0x00, 0x00,
	/* Graphics */
    0x00, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0F, 0xFF,
	/* Sequencer */
    0x03, 0x01, 0x0F, 0x00, 0x06,
	/* misc. output */
    0x2f,
	/* extra CRT registers: */
    0xff, 0x4a, 0x01, 0x22,
	/* extra graphics registers: */
    0x00, 0x00, 0x00,
	/* extra sequencer registers: */
  0x0f, 0x12, 0x00, 0x80, 0x0c, 0x19, 0x4a, 0x5b, 0x45, 0x55, 0x10, 0x00,
  0x00, 0x00, 0x00, 0x00, 0x00, 0xd8, 0x00, 0x00, 0x01, 0x00, 0x2b, 0x2f,
    0x30, 0x36, 0x1c,
	/* Hicolor DAC */
    0x00
};

/* Non-interlaced. */
static const unsigned char g1024x768x16_regs[95] =
{
	/* CRTC */
  0xa1, 0x7f, 0x80, 0x84, 0x84, 0x92, 0x2a, 0xfd, 0x00, 0x60, 0x00, 0x00,
  0x00, 0x00, 0x04, 0x00, 0x12, 0x89, 0xff, 0x40, 0x00, 0x00, 0x2a, 0xe3,
	/* ATC */
  0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B,
    0x0C, 0x0D, 0x0E, 0x0F, 0x01, 0x00, 0x0F, 0x00, 0x00,
	/* Graphics */
    0x00, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0F, 0xFF,
	/* Sequencer */
    0x00, 0x01, 0x0F, 0x00, 0x06,
	/* misc. output */
    0xef,
	/* extra CRT registers: */
    0xff, 0x4a, 0x00, 0x22,
	/* extra graphics registers: */
    0x00, 0x00, 0x00,
	/* extra sequencer registers: */
  0x0f, 0x12, 0x00, 0x80, 0x1c, 0x51, 0x4a, 0x5b, 0x45, 0x61, 0x10, 0x00,
  0x00, 0x00, 0x00, 0x00, 0x00, 0xdd, 0x00, 0x00, 0x01, 0x00, 0x2b, 0x2f,
    0x30, 0x24, 0x1c,
	/* Hicolor DAC */
    0x00
};

static const unsigned char g1280x1024x16i_regs[95] =
{
	/* CRTC */
  0xbd, 0x9f, 0xa0, 0x80, 0xa4, 0x19, 0x2a, 0xb2, 0x00, 0x60, 0x00, 0x00,
  0x00, 0x00, 0x0f, 0x00, 0x0b, 0x80, 0xff, 0x50, 0x00, 0x00, 0x2a, 0xe3,
	/* ATC */
  0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B,
    0x0C, 0x0D, 0x0E, 0x0F, 0x01, 0x00, 0x0F, 0x00, 0x00,
	/* Graphics */
    0x00, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0F, 0xFF,
	/* Sequencer */
    0x00, 0x01, 0x0F, 0x00, 0x06,
	/* misc. output */
    0xef,
	/* extra CRT registers: */
    0xff, 0x60, 0x01, 0x22,
	/* extra graphics registers: */