smc91111.h

RTEMS (Real-Time Executive for Multiprocessor Systems) is a free open source real-time operating sys

// PHY Auto-Negotiation Advertisement Register
#define PHY_AD_REG		0x04
#define PHY_AD_NP		0x8000	// 1=PHY requests exchange of Next Page
#define PHY_AD_ACK		0x4000	// 1=got link code word from remote
#define PHY_AD_RF		0x2000	// 1=advertise remote fault
#define PHY_AD_T4		0x0200	// 1=PHY is capable of 100Base-T4
#define PHY_AD_TX_FDX		0x0100	// 1=PHY is capable of 100Base-TX FDPLX
#define PHY_AD_TX_HDX		0x0080	// 1=PHY is capable of 100Base-TX HDPLX
#define PHY_AD_10_FDX		0x0040	// 1=PHY is capable of 10Base-T FDPLX
#define PHY_AD_10_HDX		0x0020	// 1=PHY is capable of 10Base-T HDPLX
#define PHY_AD_CSMA		0x0001	// 1=PHY is capable of 802.3 CMSA


static int debugflag_out = 0;

#define dbc_printf(lvl,format, args...) do { \
  if (!debugflag_out) { \
  if (lvl & DEBUG) { \
    char buf[1024]; \
    sprintf(buf,format,##args); \
    DEBUG_puts(buf); \
  }} \
} while(0)

#define db64_printf(format, args...) dbc_printf(64,format,##args);
#define db16_printf(format, args...) dbc_printf(16,format,##args);
#define db9_printf(format, args...) dbc_printf(9,format,##args);
#define db4_printf(format, args...) dbc_printf(4,format,##args);
#define db2_printf(format, args...) dbc_printf(2,format,##args);
#define db1_printf(format, args...) dbc_printf(1,format,##args);
#define db_printf(format, args...) dbc_printf(0xffff,format,##args);

#if DEBUG & 1
#define DEBUG_FUNCTION() do { db_printf("# %s\n", __FUNCTION__); } while (0)
#else
#define DEBUG_FUNCTION() do {} while(0)
#endif


/* ------------------------------------------------------------------------*/

struct smsc_lan91cxx_stats {
    unsigned int tx_good             ;
    unsigned int tx_max_collisions   ;
    unsigned int tx_late_collisions  ;
    unsigned int tx_underrun         ;
    unsigned int tx_carrier_loss     ;
    unsigned int tx_deferred         ;
    unsigned int tx_sqetesterrors    ;
    unsigned int tx_single_collisions;
    unsigned int tx_mult_collisions  ;
    unsigned int tx_total_collisions ;
    unsigned int rx_good             ;
    unsigned int rx_crc_errors       ;
    unsigned int rx_align_errors     ;
    unsigned int rx_resource_errors  ;
    unsigned int rx_overrun_errors   ;
    unsigned int rx_collisions       ;
    unsigned int rx_short_frames     ;
    unsigned int rx_too_long_frames  ;
    unsigned int rx_symbol_errors    ;
    unsigned int interrupts          ;
    unsigned int rx_count            ;
    unsigned int rx_deliver          ;
    unsigned int rx_resource         ;
    unsigned int rx_restart          ;
    unsigned int tx_count            ;
    unsigned int tx_complete         ;
    unsigned int tx_dropped          ;
};
#define INCR_STAT(c,n) (((c)->stats.n)++)

struct lan91cxx_priv_data;

typedef struct lan91cxx_priv_data {

    /* frontend */
    struct arpcom arpcom;
    rtems_id rxDaemonTid;
    rtems_id txDaemonTid;

    scmv91111_configuration_t config;
  
    /* backend */
    int rpc_cur_mode;
    int autoneg_active;
    int phyaddr;
    unsigned int lastPhy18;
  
    int txbusy;                         /* A packet has been sent*/
    unsigned long txkey;                /* Used to ack when packet sent*/
    unsigned short* base;               /* Base I/O address of controller*/
                                        /* (as it comes out of reset)*/
    int interrupt;                      /* Interrupt vector used by controller*/
    unsigned char enaddr[6];            /* Controller ESA*/
    /* Function to configure the ESA - may fetch ESA from EPROM or */
    /* RedBoot config option.  Use of the 'config_enaddr()' function*/
    /* is depreciated in favor of the 'provide_esa()' function and*/
    /* 'hardwired_esa' boolean*/
    void (*config_enaddr)(struct lan91cxx_priv_data* cpd);
    int hardwired_esa;
    int txpacket;
    int rxpacket;
    int within_send;
    int c111_reva;                      /* true if this is a revA LAN91C111*/
    struct smsc_lan91cxx_stats stats;
} lan91cxx_priv_data;

/* ------------------------------------------------------------------------*/

#ifdef LAN91CXX_32BIT_RX
typedef unsigned int rxd_t;
#else
typedef unsigned short rxd_t;
#endif

typedef struct _debug_regs_pair {
  int reg; char *name; struct _debug_regs_pair *bits;
} debug_regs_pair;

static debug_regs_pair debug_regs[] = {
  {LAN91CXX_TCR        , "LAN91CXX_TCR"       ,0},  
  {LAN91CXX_EPH_STATUS , "LAN91CXX_EPH_STATUS",0},  
  {LAN91CXX_RCR        , "LAN91CXX_RCR"       ,0},         
  {LAN91CXX_COUNTER    , "LAN91CXX_COUNTER"   ,0},     
  {LAN91CXX_MIR        , "LAN91CXX_MIR"       ,0},         
  {LAN91CXX_MCR        , "LAN91CXX_MCR"       ,0},         
  {LAN91CXX_RPCR       , "LAN91CXX_RPCR"      ,0},        
  {LAN91CXX_RESERVED_0 , "LAN91CXX_RESERVED_0",0},  
  {LAN91CXX_BS         , "LAN91CXX_BS"        ,0},          
  {LAN91CXX_CONFIG     , "LAN91CXX_CONFIG"    ,0},      
  {LAN91CXX_BASE_REG   , "LAN91CXX_BASE_REG"  ,0},    
  {LAN91CXX_IA01       , "LAN91CXX_IA01"      ,0},        
  {LAN91CXX_IA23       , "LAN91CXX_IA23"      ,0},        
  {LAN91CXX_IA45       , "LAN91CXX_IA45"      ,0},        
  {LAN91CXX_GENERAL    , "LAN91CXX_GENERAL"   ,0},     
  {LAN91CXX_CONTROL    , "LAN91CXX_CONTROL"   ,0},     
  {LAN91CXX_BS2        , "LAN91CXX_BS2"       ,0},         
  {LAN91CXX_MMU_COMMAND, "LAN91CXX_MMU_COMMAND",0}, 
  {LAN91CXX_PNR        , "LAN91CXX_PNR"        ,0},         
  {LAN91CXX_FIFO_PORTS , "LAN91CXX_FIFO_PORTS" ,0},  
  {LAN91CXX_POINTER    , "LAN91CXX_POINTER"    ,0},     
  {LAN91CXX_DATA_HIGH  , "LAN91CXX_DATA_HIGH"  ,0},   
  {LAN91CXX_DATA       , "LAN91CXX_DATA"       ,0},        
  {LAN91CXX_INTERRUPT  , "LAN91CXX_INTERRUPT"  ,0},
  {LAN91CXX_BS3        , "LAN91CXX_BS3"        ,0},
  {LAN91CXX_MT01       , "LAN91CXX_MT01"       ,0},
  {LAN91CXX_MT23       , "LAN91CXX_MT23"       ,0},   
  {LAN91CXX_MT45       , "LAN91CXX_MT45"       ,0},      
  {LAN91CXX_MT67       , "LAN91CXX_MT67"       ,0},
/*{LAN91CXX_MGMT       , "LAN91CXX_MGMT"       ,0},      */
  {LAN91CXX_REVISION   , "LAN91CXX_REVISION"   ,0},  
  {LAN91CXX_ERCV       , "LAN91CXX_ERCV"       ,0},      
  {LAN91CXX_BS4        , "LAN91CXX_BS4"        ,0},             


  
  {-1,0}
};

static char *dbg_prefix = "";

#ifndef SMSC_PLATFORM_DEFINED_GET_REG
static __inline__ unsigned short
get_reg(struct lan91cxx_priv_data *cpd, int regno)
{
    unsigned short val; debug_regs_pair *dbg = debug_regs; int c;
    unsigned32              Irql;

    /*rtems_interrupt_disable(Irql);*/

    HAL_WRITE_UINT16(cpd->base+(LAN91CXX_BS), CYG_CPU_TO_LE16(regno>>3));
    HAL_READ_UINT16(cpd->base+((regno&0x7)), val);
    val = CYG_LE16_TO_CPU(val);
    
    /*rtems_interrupt_enable(Irql);*/

#ifdef DEBUG & 32
    while ((c = dbg->reg) != -1) {
      if (c == regno) {
        db_printf("%sread  reg [%d:%x] -> 0x%04x (%-20s)\n", dbg_prefix, regno>>3,(regno&0x7)*2, val, dbg->name);
        break;
      }
      dbg++;
    }
#else    
    db2_printf("%sread  reg %d:%x -> 0x%04x\n", dbg_prefix, regno>>3,(regno&0x7)*2, val);
#endif
    
    return val;
}
#endif /* SMSC_PLATFORM_DEFINED_GET_REG*/

#ifndef SMSC_PLATFORM_DEFINED_PUT_REG
static __inline__ void
put_reg(struct lan91cxx_priv_data *cpd, int regno, unsigned short val)
{
    debug_regs_pair *dbg = debug_regs; int c;
    unsigned32              Irql;

#ifdef DEBUG & 32
    while ((c = dbg->reg) != -1) {
      if (c == regno) {
        db_printf("%swrite reg [%d:%x] <- 0x%04x (%-20s)\n", dbg_prefix, regno>>3, (regno&0x07)*2, val, dbg->name);
        break;
      }
      dbg++;
    }
#else    
    db2_printf("%swrite reg %d:%x <- 0x%04x\n", dbg_prefix, regno>>3,(regno&0x7)*2, val);
#endif
    
    /*rtems_interrupt_disable(Irql);*/
    
    HAL_WRITE_UINT16(cpd->base+(LAN91CXX_BS), CYG_CPU_TO_LE16(regno>>3));
    HAL_WRITE_UINT16(cpd->base+((regno&0x7)), CYG_CPU_TO_LE16(val));
    
    /*rtems_interrupt_enable(Irql);*/

}
#endif /* SMSC_PLATFORM_DEFINED_PUT_REG*/

#ifndef SMSC_PLATFORM_DEFINED_PUT_DATA
/* ------------------------------------------------------------------------*/
/* Assumes bank2 has been selected*/
static __inline__ void
put_data(struct lan91cxx_priv_data *cpd, unsigned short val)
{
    db2_printf("%s[wdata] <- 0x%04x\n", dbg_prefix, val);
    
    HAL_WRITE_UINT16(cpd->base+((LAN91CXX_DATA & 0x7)), val);

}
#endif /* SMSC_PLATFORM_DEFINED_PUT_DATA*/

#ifndef SMSC_PLATFORM_DEFINED_GET_DATA
/* Assumes bank2 has been selected*/
static __inline__ rxd_t
get_data(struct lan91cxx_priv_data *cpd)
{
    rxd_t val;
	
#ifdef LAN91CXX_32BIT_RX
    HAL_READ_UINT32(cpd->base+((LAN91CXX_DATA_HIGH & 0x7)), val);
#else
    HAL_READ_UINT16(cpd->base+((LAN91CXX_DATA & 0x7)), val);
#endif

    db2_printf("%s[rdata] -> 0x%08x\n", dbg_prefix, val);
    return val;
}
#endif /* SMSC_PLATFORM_DEFINED_GET_DATA*/

/* ------------------------------------------------------------------------*/
/* Read the bank register (this one is bank-independent)*/
#ifndef SMSC_PLATFORM_DEFINED_GET_BANKSEL
static __inline__ unsigned short
get_banksel(struct lan91cxx_priv_data *cpd)
{
    unsigned short val;
    
    HAL_READ_UINT16(cpd->base+(LAN91CXX_BS), val);
    val = CYG_LE16_TO_CPU(val);
    db2_printf("read bank sel val 0x%04x\n", val);
    return val;
}
#endif





#endif  /* _SMC_91111_H_ */