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📄 mpc8xx.h

📁 RTEMS (Real-Time Executive for Multiprocessor Systems) is a free open source real-time operating sys
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  rtems_unsigned32      siumcr;  rtems_unsigned32      sypcr;#if defined(mpc860)  rtems_unsigned32      swt;#elif defined(mpc821)  rtems_unsigned32      _pad70;#endif  rtems_unsigned16      _pad0;  rtems_unsigned16      swsr;  rtems_unsigned32      sipend;  rtems_unsigned32      simask;  rtems_unsigned32      siel;  rtems_unsigned32      sivec;  rtems_unsigned32      tesr;  rtems_unsigned32      _pad1[3];  rtems_unsigned32      sdcr;  rtems_unsigned8       _pad2[0x80-0x34];    /*   * PCMCIA Block   */  rtems_unsigned32      pbr0;  rtems_unsigned32      por0;  rtems_unsigned32      pbr1;  rtems_unsigned32      por1;  rtems_unsigned32      pbr2;  rtems_unsigned32      por2;  rtems_unsigned32      pbr3;  rtems_unsigned32      por3;  rtems_unsigned32      pbr4;  rtems_unsigned32      por4;  rtems_unsigned32      pbr5;  rtems_unsigned32      por5;  rtems_unsigned32      pbr6;  rtems_unsigned32      por6;  rtems_unsigned32      pbr7;  rtems_unsigned32      por7;  rtems_unsigned8       _pad3[0xe0-0xc0];  rtems_unsigned32      pgcra;  rtems_unsigned32      pgcrb;  rtems_unsigned32      pscr;  rtems_unsigned32      _pad4;  rtems_unsigned32      pipr;  rtems_unsigned32      _pad5;  rtems_unsigned32      per;  rtems_unsigned32      _pad6;    /*   * MEMC Block   */  m8xxMEMCRegisters_t   memc[8];  rtems_unsigned8       _pad7[0x164-0x140];  rtems_unsigned32      mar;  rtems_unsigned32      mcr;  rtems_unsigned32      _pad8;  rtems_unsigned32      mamr;  rtems_unsigned32      mbmr;  rtems_unsigned16      mstat;  rtems_unsigned16      mptpr;  rtems_unsigned32      mdr;  rtems_unsigned8       _pad9[0x200-0x180];    /*   * System integration timers   */  rtems_unsigned16      tbscr;  rtems_unsigned16      _pad10;  rtems_unsigned32      tbreff0;  rtems_unsigned32      tbreff1;  rtems_unsigned8       _pad11[0x220-0x20c];  rtems_unsigned16      rtcsc;  rtems_unsigned16      _pad12;  rtems_unsigned32      rtc;  rtems_unsigned32      rtsec;  rtems_unsigned32      rtcal;  rtems_unsigned32      _pad13[4];  rtems_unsigned16      piscr;  rtems_unsigned16      _pad14;  rtems_unsigned16      pitc;  rtems_unsigned16      _pad_14_1;  rtems_unsigned16      pitr;  rtems_unsigned16      _pad_14_2;  rtems_unsigned8       _pad15[0x280-0x24c];      /*   * Clocks and Reset   */  rtems_unsigned32      sccr;  rtems_unsigned32      plprcr;  rtems_unsigned32      rsr;  rtems_unsigned8       _pad16[0x300-0x28c];      /*   * System integration timers keys   */  rtems_unsigned32      tbscrk;  rtems_unsigned32      tbreff0k;  rtems_unsigned32      tbreff1k;  rtems_unsigned32      tbk;  rtems_unsigned32      _pad17[4];  rtems_unsigned32      rtcsk;  rtems_unsigned32      rtck;  rtems_unsigned32      rtseck;  rtems_unsigned32      rtcalk;  rtems_unsigned32      _pad18[4];  rtems_unsigned32      piscrk;  rtems_unsigned32      pitck;  rtems_unsigned8       _pad19[0x380-0x348];    /*   * Clocks and Reset Keys   */  rtems_unsigned32      sccrk;  rtems_unsigned32      plprck;  rtems_unsigned32      rsrk;  rtems_unsigned8       _pad20[0x400-0x38c];  rtems_unsigned8       _pad21[0x800-0x400];  rtems_unsigned8       _pad22[0x860-0x800];      /*   * I2C   */  rtems_unsigned8       i2mod;  rtems_unsigned8       _pad23[3];  rtems_unsigned8       i2add;  rtems_unsigned8       _pad24[3];  rtems_unsigned8       i2brg;  rtems_unsigned8       _pad25[3];  rtems_unsigned8       i2com;  rtems_unsigned8       _pad26[3];  rtems_unsigned8       i2cer;  rtems_unsigned8       _pad27[3];  rtems_unsigned8       i2cmr;  rtems_unsigned8       _pad28[0x900-0x875];    /*   * DMA Block   */  rtems_unsigned32      _pad29;  rtems_unsigned32      sdar;  rtems_unsigned8       sdsr;  rtems_unsigned8       _pad30[3];  rtems_unsigned8       sdmr;  rtems_unsigned8       _pad31[3];  rtems_unsigned8       idsr1;  rtems_unsigned8       _pad32[3];  rtems_unsigned8       idmr1;  rtems_unsigned8       _pad33[3];  rtems_unsigned8       idsr2;  rtems_unsigned8       _pad34[3];  rtems_unsigned8       idmr2;  rtems_unsigned8       _pad35[0x930-0x91d];    /*   * CPM Interrupt Control Block   */  rtems_unsigned16      civr;  rtems_unsigned8       _pad36[14];  rtems_unsigned32      cicr;  rtems_unsigned32      cipr;  rtems_unsigned32      cimr;  rtems_unsigned32      cisr;    /*   * I/O Port Block   */  rtems_unsigned16      padir;  rtems_unsigned16      papar;  rtems_unsigned16      paodr;  rtems_unsigned16      padat;  rtems_unsigned8       _pad37[8];  rtems_unsigned16      pcdir;  rtems_unsigned16      pcpar;  rtems_unsigned16      pcso;  rtems_unsigned16      pcdat;  rtems_unsigned16      pcint;  rtems_unsigned8       _pad39[6];  rtems_unsigned16      pddir;  rtems_unsigned16      pdpar;  rtems_unsigned16      _pad40;  rtems_unsigned16      pddat;  rtems_unsigned8       _pad41[8];    /*   * CPM Timers Block   */  rtems_unsigned16      tgcr;  rtems_unsigned8       _pad42[14];  rtems_unsigned16      tmr1;  rtems_unsigned16      tmr2;  rtems_unsigned16      trr1;  rtems_unsigned16      trr2;  rtems_unsigned16      tcr1;  rtems_unsigned16      tcr2;  rtems_unsigned16      tcn1;  rtems_unsigned16      tcn2;  rtems_unsigned16      tmr3;  rtems_unsigned16      tmr4;  rtems_unsigned16      trr3;  rtems_unsigned16      trr4;  rtems_unsigned16      tcr3;  rtems_unsigned16      tcr4;  rtems_unsigned16      tcn3;  rtems_unsigned16      tcn4;  rtems_unsigned16      ter1;  rtems_unsigned16      ter2;  rtems_unsigned16      ter3;  rtems_unsigned16      ter4;  rtems_unsigned8       _pad43[8];  /*   * CPM Block   */  rtems_unsigned16      cpcr;  rtems_unsigned16      _pad44;  rtems_unsigned16      rccr;  rtems_unsigned8       _pad45;  rtems_unsigned8       rmds;  rtems_unsigned32      rmdr;  rtems_unsigned16      rctr1;  rtems_unsigned16      rctr2;  rtems_unsigned16      rctr3;  rtems_unsigned16      rctr4;  rtems_unsigned16      _pad46;  rtems_unsigned16      rter;  rtems_unsigned16      _pad47;  rtems_unsigned16      rtmr;  rtems_unsigned8       _pad48[0x9f0-0x9dc];    /*   * BRG Block   */  rtems_unsigned32      brgc1;  rtems_unsigned32      brgc2;  rtems_unsigned32      brgc3;  rtems_unsigned32      brgc4;    /*   * SCC Block   */  m8xxSCCRegisters_t    scc1;  m8xxSCCRegisters_t    scc2;#if defined(mpc860)  m8xxSCCRegisters_t    scc3;  m8xxSCCRegisters_t    scc4;#elif defined(mpc821)  rtems_unsigned8	_pad72[0xa80-0xa40];#endif  /*   * SMC Block   */  m8xxSMCRegisters_t    smc1;  m8xxSMCRegisters_t    smc2;    /*   * SPI Block   */  rtems_unsigned16      spmode;  rtems_unsigned16      _pad49[2];  rtems_unsigned8       spie;  rtems_unsigned8       _pad50;  rtems_unsigned16      _pad51;  rtems_unsigned8       spim;  rtems_unsigned8       _pad52[2];  rtems_unsigned8       spcom;  rtems_unsigned16      _pad53[2];    /*   * PIP Block   */  rtems_unsigned16      pipc;  rtems_unsigned16      _pad54;  rtems_unsigned16      ptpr;  rtems_unsigned32      pbdir;  rtems_unsigned32      pbpar;  rtems_unsigned16      _pad55;  rtems_unsigned16      pbodr;  rtems_unsigned32      pbdat;  rtems_unsigned32      _pad56[6];    /*   * SI Block   */  rtems_unsigned32      simode;  rtems_unsigned8       sigmr;  rtems_unsigned8       _pad57;  rtems_unsigned8       sistr;  rtems_unsigned8       sicmr;  rtems_unsigned32      _pad58;  rtems_unsigned32      sicr;  rtems_unsigned16      sirp[2];  rtems_unsigned32      _pad59[3];  rtems_unsigned8       _pad60[0xc00-0xb00];  rtems_unsigned8       siram[512];#if defined(mpc860)  /*   * This is only used on the MPC8xxT - for the Fast Ethernet Controller (FEC)   */  m8xxFECRegisters_t    fec;#elif defined(mpc821)  rtems_unsigned8       lcdram[512];#endif  rtems_unsigned8       _pad62[0x2000-0x1000];    /*   * Dual-port RAM   */  rtems_unsigned8       dpram0[0x200];  /* BD/DATA/UCODE */  rtems_unsigned8       dpram1[0x200];  /* BD/DATA/UCODE */  rtems_unsigned8       dpram2[0x400];  /* BD/DATA/UCODE */  rtems_unsigned8       dpram3[0x600];  /* BD/DATA*/  rtems_unsigned8       dpram4[0x200];  /* BD/DATA/UCODE */  rtems_unsigned8       _pad63[0x3c00-0x3000];    /* When using SCC1 for ethernet, we lose the use of I2C since   *  their parameters would overlap. Motorola has a microcode   *  patch to move parameters around so that both can be used   *  together. It is available on their web site somewhere    *  under http://www.mot.com/mpc8xx. If ethernet is used on   *  one (or more) of the other SCCs, then other CPM features   *  will be unavailable:   *    SCC2    -> lose SPI   *    SCC3    -> lose SMC1   *    SCC4    -> lose SMC2   *  However, Ethernet only works on SCC1 on the 8xx.   */  m8xxSCCENparms_t      scc1p;  rtems_unsigned8       _rsv1[0xCB0-0xC00-sizeof(m8xxSCCENparms_t)];  m8xxMiscParms_t       miscp;  rtems_unsigned8       _rsv2[0xcc0-0xCB0-sizeof(m8xxMiscParms_t)];  m8xxIDMAparms_t       idma1p;  rtems_unsigned8       _rsv3[0xd00-0xcc0-sizeof(m8xxIDMAparms_t)];    m8xxSCCparms_t        scc2p;  rtems_unsigned8       _rsv4[0xD80-0xD00-sizeof(m8xxSCCparms_t)];  m8xxSPIparms_t        spip;  rtems_unsigned8       _rsv5[0xDB0-0xD80-sizeof(m8xxSPIparms_t)];  m8xxTimerParms_t      tmp;  rtems_unsigned8       _rsv6[0xDC0-0xDB0-sizeof(m8xxTimerParms_t)];  m8xxIDMAparms_t       idma2p;  rtems_unsigned8       _rsv7[0xE00-0xDC0-sizeof(m8xxIDMAparms_t)];    m8xxSCCparms_t        scc3p; /* Not available on MPC821 */  rtems_unsigned8       _rsv8[0xE80-0xE00-sizeof(m8xxSCCparms_t)];  m8xxSMCparms_t        smc1p;  rtems_unsigned8       _rsv9[0xEC0-0xE80-sizeof(m8xxSMCparms_t)];  m8xxDSPparms_t        dsp1p;  rtems_unsigned8       _rsv10[0xF00-0xEC0-sizeof(m8xxDSPparms_t)];    m8xxSCCparms_t        scc4p; /* Not available on MPC821 */  rtems_unsigned8       _rsv11[0xF80-0xF00-sizeof(m8xxSCCparms_t)];  m8xxSMCparms_t        smc2p;  rtems_unsigned8       _rsv12[0xFC0-0xF80-sizeof(m8xxSMCparms_t)];  m8xxDSPparms_t        dsp2p;  rtems_unsigned8       _rsv13[0x1000-0xFC0-sizeof(m8xxDSPparms_t)];} m8xx_t;extern volatile m8xx_t m8xx;#ifdef __cplusplus}#endif#endif /* ASM */#endif /* __MPC8xx_h */

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