network.c

RTEMS (Real-Time Executive for Multiprocessor Systems) is a free open source real-time operating sys

/*
 * RTEMS driver for M68360 SCC1 Ethernet
 * W. Eric Norum
 * Saskatchewan Accelerator Laboratory
 * University of Saskatchewan
 * Saskatoon, Saskatchewan, CANADA
 * [e-mail]
 *
 *  $Id: network.c,v 1.2 2000/12/14 19:38:51 joel Exp $
 *
 * Modify for Motorola 68en320 Ethernet Controller
 * CXR S.A. France - 2000/09/14  - [e-mail]
 */
#include <bsp.h>
#include <stdio.h>
#include <rtems/error.h>
#include <m302_int.h>
#include <rtems/rtems_bsdnet.h>

#include <sys/param.h>
#include <sys/mbuf.h>
#include <sys/socket.h>
#include <sys/sockio.h>

#include <net/if.h>

#include <netinet/in.h>
#include <netinet/if_ether.h>
#include <m68302.h>

/*
 * Number of SCCs supported by this driver
 */
#define NSCCDRIVER	1

/*
 * Default number of buffer descriptors set aside for this driver.
 * The number of transmit buffer descriptors has to be quite large
 * since a single frame often uses four or more buffer descriptors.
 */
#define RX_BUF_COUNT     64
#define TX_BUF_COUNT     64

/*
 * RTEMS event used by interrupt handler to signal driver tasks.
 * This must not be any of the events used by the network task synchronization.
 */
#define INTERRUPT_EVENT	RTEMS_EVENT_1

/*
 * RTEMS event used to start transmit daemon.
 * This must not be the same as INTERRUPT_EVENT.
 */
#define START_TRANSMIT_EVENT	RTEMS_EVENT_2

/*
 * Receive buffer size -- Allow for a full ethernet packet including CRC
 */
#define RBUF_SIZE	1520

#if (MCLBYTES < RBUF_SIZE)
# error "Driver must have MCLBYTES > RBUF_SIZE"
#endif

static 	struct m68302_imp *		a_m68302_imp;

#define M302_ETHER_IVECTOR		0x40

/*
 * Per-device data
 */
struct scc_softc {
	struct arpcom		arpcom;
	struct mbuf		**rxMbuf;
	struct mbuf		**txMbuf;
	int			acceptBroadcast;
	int			rxBdCount;
	int			txBdCount;
	int			txBdHead;
	int			txBdTail;
	int			txBdActiveCount;

	struct m68302_scc_bd 	*rxBdBase;
	struct m68302_scc_bd 	*txBdBase;

	rtems_id		rxDaemonTid;
	rtems_id		txDaemonTid;

	/*
	 * Statistics
	 */
	unsigned long	rxInterrupts;
	unsigned long	rxNotFirst;
	unsigned long	rxNotLast;
	unsigned long	rxGiant;
	unsigned long	rxNonOctet;
	unsigned long	rxRunt;
	unsigned long	rxBadCRC;
	unsigned long	rxOverrun;
	unsigned long	rxCollision;

	unsigned long	txInterrupts;
	unsigned long	txDeferred;
	unsigned long	txHeartbeat;
	unsigned long	txLateCollision;
	unsigned long	txRetryLimit;
	unsigned long	txUnderrun;
	unsigned long	txLostCarrier;
	unsigned long	txRawWait;
	unsigned long	txCoalesced;
	unsigned long	txCoalesceFailed;
	unsigned long	txRetry;
};
static struct scc_softc scc_softc[NSCCDRIVER];

/*
 *  interrupt handler
 */
static rtems_isr
m302Enet_interrupt_handler (rtems_vector_number v)
{

	/*
	 * Frame received?
	 */
	if (M68en302imp_intr_event & INTR_EVENT_BIT_RFINT) {
		M68en302imp_intr_event = INTR_EVENT_BIT_RFINT;
		M68en302imp_intr_mask &= ~INTR_MASK_BIT_RFIEN;
		scc_softc[0].rxInterrupts++;
		rtems_event_send (scc_softc[0].rxDaemonTid, INTERRUPT_EVENT);
	}

	/*
	 * Buffer transmitted    or transmitter error?
	 */
	if ((M68en302imp_intr_event & INTR_EVENT_BIT_TFINT) ||
		 ((M68en302imp_intr_event & INTR_EVENT_BIT_TXB))){
		M68en302imp_intr_event = INTR_EVENT_BIT_TFINT | INTR_EVENT_BIT_TXB;
		M68en302imp_intr_mask &= ~(INTR_MASK_BIT_TFIEN | INTR_MASK_BIT_TXIEN);
		scc_softc[0].txInterrupts++;
		rtems_event_send (scc_softc[0].txDaemonTid, INTERRUPT_EVENT);
	}
}

/*
 * Initialize the ethernet hardware
 */
static void
m302Enet_initialize_hardware (struct scc_softc *sc)
{
	int i;
	unsigned char *hwaddr;
	rtems_status_code status;
	rtems_isr_entry old_handler;
	struct m68302_scc_bd	*a_bd;			/* Buffer Descriptor pointer */
	ushort *cam;
#define LBK		0x0008
#define DSQE	0x0010
#define FDE		0x0020

	

	/*
	 * standard loopback
	 */
	M68302imp_port_data	(1) &= ~(LBK);	
	M68302imp_port_data	(1) |= (FDE);

		
	M68en302imp_ecntrl=0x0001;
	/*
	 * Set dma configuration status register EDMA
	 */
	i = (sc->txBdCount == 16) ? EDMA_BDSIZE_16T_112R :
			(sc->txBdCount == 32) ? EDMA_BDSIZE_32T_96R :
			(sc->txBdCount == 64) ? EDMA_BDSIZE_64T_64R :
			EDMA_BDSIZE_8T_120R;
	
	M68en302imp_edma =  EDMA_BLIM_8ACCESS | EDMA_WMRK_16FIFO | EDMA_BIT_TSRLY | (ushort)i;
	
	/*
	 * Set maximum receive buffer length
	 */

	M68en302imp_emrblr = RBUF_SIZE;	/* 1520 */
	
	/*
	 * Set interrupt vector
	 */
	M68en302imp_intr_vect = M302_ETHER_IVECTOR;


	M68en302imp_intr_mask=0x0;
	
	/*
	 * Set ethernet Configuration
	 */
	M68en302imp_ecnfig=0x0000;
	
	/*
	 * Set ETHER_TEST
	 */
	M68en302imp_ether_test=0x0000;
	
	/*
	 *  Set AR control Register
	 *	Ignore/accept broadcast packets as specified
	 */
	M68en302imp_ar_cntrl = ((sc->acceptBroadcast) ? 0 : AR_CNTRL_BIT_NO_BROADCAST) ;
	
	/*
	 * Allocate mbuf pointers
	 */
	sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf, M_MBUF, M_NOWAIT);
	sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf, M_MBUF, M_NOWAIT);
	if (!sc->rxMbuf || !sc->txMbuf)
		rtems_panic ("No memory for mbuf pointers");

	/*
	 * Set our physical address
	 */
	hwaddr = sc->arpcom.ac_enaddr;
	
	cam=(ushort *)(M68en302imp_cet);
	for (i=0;i<64;i++){
		cam[(4*i)]=0x00ff;
		cam[(4*i)+1]=0x00ff;
		cam[(4*i)+2]=0x00ff;
	}

	cam[4] = (hwaddr[0] << 8) | hwaddr[1];
	cam[5] = (hwaddr[2] << 8) | hwaddr[3];
	cam[6] = (hwaddr[4] << 8) | hwaddr[5];

	
	/*
	 * Set receiver and transmitter buffer descriptor bases
	 */
	a_bd = M68302imp_a_eth_bd (0);			/* point to first BD */


	for (i=0;i<128;i++){
		
		M68302_scc_bd_stat_ctrl	(a_bd + i) = 0;
		M68302_scc_bd_data_lgth	(a_bd + i) = 0;
		M68302_scc_bd_p_buffer	(a_bd + i) = NULL;
	}

	
	sc->txBdBase = M68302imp_a_eth_bd (  0 );			/* point to first BD */
	sc->rxBdBase = M68302imp_a_eth_bd ( sc->txBdCount);		/* point to first RX BD atfer all TX*/

	/*
	 * Set up transmit buffer descriptors
	 */
	for (i = 0 ; i < sc->txBdCount ; i++) {
		sc->txMbuf[i] = NULL;
	}
	sc->txBdHead = sc->txBdTail = 0;
	sc->txBdActiveCount = 0;

	/*
	 * Clear any outstanding events
	 */
	M68en302imp_intr_event = 0x07FF;
	/*
	 * Set up interrupts
	 */
	
	status = rtems_interrupt_catch (m302Enet_interrupt_handler,
						M302_ETHER_IVECTOR,
						&old_handler);
	if (status != RTEMS_SUCCESSFUL)
		rtems_panic ("Can't attach M302 ether interrupt handler: %s\r\n",
						rtems_status_text (status));
}

/*
 * Soak up buffer descriptors that have been sent
 * Note that a buffer descriptor can't be retired as soon as it becomes
 * ready.  The MC68360 Errata (May 96) says that, "If an Ethernet frame is
 *  made up of multiple buffers, the user should not reuse the first buffer
 * descriptor until the last buffer descriptor of the frame has had its
 * ready bit cleared by the CPM".
 */
static void
m302Enet_retire_tx_bd (struct scc_softc *sc)
{

	rtems_unsigned16 status;
	int i;
	int nRetired;
	struct mbuf *m, *n;
	int retries = 0;
	int saveStatus = 0;

	i = sc->txBdTail;
	nRetired = 0;
	while ((sc->txBdActiveCount != 0)
	   &&  (((status = (sc->txBdBase + i)->stat_ctrl) & BUF_STAT_READY) == 0)) {
		/*
		 * Check for errors which stop the transmitter.
		 */
		if (status & (BUF_STAT_LATE_COLLISION |
				BUF_STAT_RETRY_LIMIT |
				BUF_STAT_UNDERRUN)) {
			int j;


			if (status & BUF_STAT_LATE_COLLISION)
				sc->txLateCollision++;
			if (status & BUF_STAT_RETRY_LIMIT)
				sc->txRetryLimit++;
			if (status & BUF_STAT_UNDERRUN)
				sc->txUnderrun++;

			/*
			 * Reenable buffer descriptors
			 */
			j = sc->txBdTail;
			for (;;) {
				status = (sc->txBdBase + j)->stat_ctrl;
				if (status & BUF_STAT_READY)
					break;
				(sc->txBdBase + j)->stat_ctrl = BUF_STAT_READY |
					(status & ( BUF_STAT_WRAP |
						   BUF_STAT_INTERRUPT |
						   BUF_STAT_LAST |
						   BUF_STAT_TX_CRC));
				if (status & BUF_STAT_LAST)
					break;
				if (++j == sc->txBdCount)
					j = 0;
			}

			/*
			 * Move transmitter back to the first
			 * buffer descriptor in the frame.
			 */
/*			m360.scc1p._tbptr = m360.scc1p.tbase +
				sc->txBdTail * sizeof (m360BufferDescriptor_t);
*/
			/*
			 * Restart the transmitter
			 */
/*			M360ExecuteRISC (M360_CR_OP_RESTART_TX | M360_CR_CHAN_SCC1);*/
			continue;
		}
		saveStatus |= status;
		retries += (status >> 2) & 0xF;
		nRetired++;
		if (status & BUF_STAT_LAST) {
			/*
			 * A full frame has been transmitted.
			 * Free all the associated buffer descriptors.
			 */
			if (saveStatus & BUF_STAT_DEFER)
				sc->txDeferred++;
			if (saveStatus & BUF_STAT_HEARTBIT)
				sc->txHeartbeat++;
			if (saveStatus & BUF_STAT_CARRIER_LOST)
				sc->txLostCarrier++;
			saveStatus = 0;
			sc->txRetry += retries;
			retries = 0;
			sc->txBdActiveCount -= nRetired;
			while (nRetired) {
				nRetired--;
				m = sc->txMbuf[sc->txBdTail];
				MFREE (m, n);
				if (++sc->txBdTail == sc->txBdCount)
					sc->txBdTail = 0;
			}
		}
		if (++i == sc->txBdCount)
			i = 0;
	}

}

/*
 * SCC reader task
 */
static void
scc_rxDaemon (void *arg)
{

	struct scc_softc *sc = (struct scc_softc *)arg;
	struct ifnet *ifp = &sc->arpcom.ac_if;
	struct mbuf *m;
	rtems_unsigned16 status;
	volatile struct m68302_scc_bd *rxBd;
	int rxBdIndex;

	/*
	 * Allocate space for incoming packets and start reception
	 */
	for (rxBdIndex = 0 ; ;) {
		rxBd = sc->rxBdBase + rxBdIndex;
		MGETHDR (m, M_WAIT, MT_DATA);
		MCLGET (m, M_WAIT);
		m->m_pkthdr.rcvif = ifp;
		sc->rxMbuf[rxBdIndex] = m;
		rxBd->p_buffer = mtod (m, void *);

		
		if (++rxBdIndex == sc->rxBdCount) {
			rxBd->stat_ctrl = BUF_STAT_EMPTY | BUF_STAT_INTERRUPT | BUF_STAT_WRAP;
			break;
		}
		rxBd->stat_ctrl = BUF_STAT_EMPTY | BUF_STAT_INTERRUPT;
	}

	/*
	 * Input packet handling loop
	 */
	rxBdIndex = 0;
	for (;;) {
		rxBd = sc->rxBdBase + rxBdIndex;

		/*
		 * Wait for packet if there's not one ready
		 */
		if ((status = rxBd->stat_ctrl) & BUF_STAT_EMPTY) {
			/*
			 * Clear old events
			 */
			M68en302imp_intr_event = INTR_EVENT_BIT_RFINT;

			/*
			 * Wait for packet
			 * Note that the buffer descriptor is checked
			 * *before* the event wait -- this catches the
			 * possibility that a packet arrived between the
			 * `if' above, and the clearing of the event register.
			 */
			while ((status = rxBd->stat_ctrl) & BUF_STAT_EMPTY) {
				rtems_interrupt_level level;
				rtems_event_set events;

				/*
				 * Unmask RXF (Full frame received) event
				 */
				rtems_interrupt_disable (level);
				M68en302imp_intr_mask |= INTR_MASK_BIT_RFIEN;
				
				rtems_interrupt_enable (level);
				rtems_bsdnet_event_receive (INTERRUPT_EVENT,
						RTEMS_WAIT|RTEMS_EVENT_ANY,
						RTEMS_NO_TIMEOUT,
						&events);
			}
		}

		
		/*
		 * Check that packet is valid
		 */
		if ((status & (BUF_STAT_LAST |
				BUF_STAT_FIRST_IN_FRAME |
				BUF_STAT_LONG |
				BUF_STAT_NONALIGNED |
				BUF_STAT_SHORT |
				BUF_STAT_CRC_ERROR |
				BUF_STAT_OVERRUN |
				BUF_STAT_COLLISION)) ==
						(BUF_STAT_LAST |
						BUF_STAT_FIRST_IN_FRAME)) {
			/*
			 * Pass the packet up the chain.
			 * FIXME: Packet filtering hook could be done here.
			 */
			struct ether_header *eh;

			m = sc->rxMbuf[rxBdIndex];
			m->m_len = m->m_pkthdr.len = rxBd->data_lgth -
						sizeof(rtems_unsigned32) -
						sizeof(struct ether_header);
			eh = mtod (m, struct ether_header *);
			m->m_data += sizeof(struct ether_header);
			
			ether_input (ifp, eh, m);

			/*
			 * Allocate a new mbuf
			 */
			MGETHDR (m, M_WAIT, MT_DATA);
			MCLGET (m, M_WAIT);
			m->m_pkthdr.rcvif = ifp;
			sc->rxMbuf[rxBdIndex] = m;
			rxBd->p_buffer = mtod (m, void *);
		}