📄 cpu.h
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* * These macros perform the following functions: * + initialize a context area * + restart the current thread * + calculate the initial pointer into a FP context area * + initialize an FP context area */#define _CPU_Context_Initialize( _the_context, _stack_base, _size, \ _isr, _entry_point, _is_fp ) \ do { \ unsigned32 _stack; \ \ (_the_context)->sr = 0x3000 | ((_isr) << 8); \ _stack = (unsigned32)(_stack_base) + (_size) - 4; \ (_the_context)->a7_msp = (void *)_stack; \ *(void **)_stack = (void *)(_entry_point); \ } while ( 0 )#define _CPU_Context_Restart_self( _the_context ) \ { asm volatile( "movew %0,%%sr ; " \ "moval %1,%%a7 ; " \ "rts" \ : "=d" ((_the_context)->sr), "=d" ((_the_context)->a7_msp) \ : "0" ((_the_context)->sr), "1" ((_the_context)->a7_msp) ); \ }/* * Floating Point Context Area Support routines */#if (CPU_SOFTWARE_FP == TRUE)/* * This software FP implementation is only for GCC. */#define _CPU_Context_Fp_start( _base, _offset ) \ ((void *) _Addresses_Add_offset( (_base), (_offset) ) )#define _CPU_Context_Initialize_fp( _fp_area ) \ { \ Context_Control_fp *_fp; \ _fp = *(Context_Control_fp **)_fp_area; \ _fp->_exception_bits = 0; \ _fp->_trap_enable_bits = 0; \ _fp->_sticky_bits = 0; \ _fp->_rounding_mode = 0; /* ROUND_TO_NEAREST */ \ _fp->_format = 0; /* NIL */ \ _fp->_last_operation = 0; /* NOOP */ \ _fp->_operand1.df = 0; \ _fp->_operand2.df = 0; \ }#else#define _CPU_Context_Fp_start( _base, _offset ) \ ((void *) \ _Addresses_Add_offset( \ (_base), \ (_offset) + CPU_CONTEXT_FP_SIZE - 4 \ ) \ )#define _CPU_Context_Initialize_fp( _fp_area ) \ { unsigned32 *_fp_context = (unsigned32 *)*(_fp_area); \ \ *(--(_fp_context)) = 0; \ *(_fp_area) = (unsigned8 *)(_fp_context); \ }#endif/* end of Context handler macros *//* * _CPU_Thread_Idle_body * * This routine is the CPU dependent IDLE thread body. * * NOTE: It need only be provided if CPU_PROVIDES_IDLE_THREAD_BODY * is TRUE. */void _CPU_Thread_Idle_body( void );/* * Fatal Error manager macros * * These macros perform the following functions: * + disable interrupts and halt the CPU */#if ( M68K_COLDFIRE_ARCH == 1 )#define _CPU_Fatal_halt( _error ) \ { asm volatile( "move.w %%sr,%%d0\n\t" \ "or.l %2,%%d0\n\t" \ "move.w %%d0,%%sr\n\t" \ "move.l %1,%%d0\n\t" \ "move.l #0xDEADBEEF,%%d1\n\t" \ "halt" \ : "=g" (_error) \ : "0" (_error), "d"(0x0700) \ : "d0", "d1" ); \ }#else#define _CPU_Fatal_halt( _error ) \ { asm volatile( "movl %0,%%d0; " \ "orw #0x0700,%%sr; " \ "stop #0x2700" : "=d" ((_error)) : "0" ((_error)) ); \ }#endif/* end of Fatal Error manager macros *//* * Bitfield handler macros * * These macros perform the following functions: * + scan for the highest numbered (MSB) set in a 16 bit bitfield * * NOTE: * * It appears that on the M68020 bitfield are always 32 bits wide * when in a register. This code forces the bitfield to be in * memory (it really always is anyway). This allows us to * have a real 16 bit wide bitfield which operates "correctly." */#define CPU_USE_GENERIC_BITFIELD_CODE FALSE#define CPU_USE_GENERIC_BITFIELD_DATA FALSE#if ( M68K_HAS_BFFFO == 1 )#define _CPU_Bitfield_Find_first_bit( _value, _output ) \ asm volatile( "bfffo (%1),#0,#16,%0" : "=d" (_output) : "a" (&_value));#else/* duplicates BFFFO results for 16 bits (i.e., 15-(_priority) in _CPU_Priority_bits_index is not needed), handles the 0 case, and does not molest _value -- jsg */#if ( M68K_COLDFIRE_ARCH == 1 )#define _CPU_Bitfield_Find_first_bit( _value, _output ) \ { \ extern const unsigned char __BFFFOtable[256]; \ register int dumby; \ \ asm volatile ( \ " clr.l %1\n" \ " move.w %2,%1\n" \ " lsr.l #8,%1\n" \ " beq.s 1f\n" \ " move.b (%3,%1),%0\n" \ " bra.s 0f\n" \ "1: move.w %2,%1\n" \ " move.b (%3,%1),%0\n" \ " addq.l #8,%0\n" \ "0: and.l #0xff,%0\n" \ : "=&d" ((_output)), "=&d" ((dumby)) \ : "d" ((_value)), "ao" ((__BFFFOtable)) \ : "cc" ) ; \ }#elif ( M68K_HAS_EXTB_L == 1 )#define _CPU_Bitfield_Find_first_bit( _value, _output ) \ { \ extern const unsigned char __BFFFOtable[256]; \ register int dumby; \ \ asm volatile ( " move.w %2,%1\n" \ " lsr.w #8,%1\n" \ " beq.s 1f\n" \ " move.b (%3,%1.w),%0\n" \ " extb.l %0\n" \ " bra.s 0f\n" \ "1: moveq.l #8,%0\n" \ " add.b (%3,%2.w),%0\n" \ "0:\n" \ : "=&d" ((_output)), "=&d" ((dumby)) \ : "d" ((_value)), "ao" ((__BFFFOtable)) \ : "cc" ) ; \ }#else#define _CPU_Bitfield_Find_first_bit( _value, _output ) \ { \ extern const unsigned char __BFFFOtable[256]; \ register int dumby; \ \ asm volatile ( " move.w %2,%1\n" \ " lsr.w #8,%1\n" \ " beq.s 1f\n" \ " move.b (%3,%1.w),%0\n" \ " and.l #0x000000ff,%0\n"\ " bra.s 0f\n" \ "1: moveq.l #8,%0\n" \ " add.b (%3,%2.w),%0\n" \ "0:\n" \ : "=&d" ((_output)), "=&d" ((dumby)) \ : "d" ((_value)), "ao" ((__BFFFOtable)) \ : "cc" ) ; \ }#endif#endif/* end of Bitfield handler macros *//* * Priority handler macros * * These macros perform the following functions: * + return a mask with the bit for this major/minor portion of * of thread priority set. * + translate the bit number returned by "Bitfield_find_first_bit" * into an index into the thread ready chain bit maps */#define _CPU_Priority_Mask( _bit_number ) \ ( 0x8000 >> (_bit_number) )#define _CPU_Priority_bits_index( _priority ) \ (_priority)/* end of Priority handler macros *//* functions *//* * _CPU_Initialize * * This routine performs CPU dependent initialization. */void _CPU_Initialize( rtems_cpu_table *cpu_table, void (*thread_dispatch));/* * _CPU_ISR_install_raw_handler * * This routine installs a "raw" interrupt handler directly into the * processor's vector table. */ void _CPU_ISR_install_raw_handler( unsigned32 vector, proc_ptr new_handler, proc_ptr *old_handler);/* * _CPU_ISR_install_vector * * This routine installs an interrupt vector. */void _CPU_ISR_install_vector( unsigned32 vector, proc_ptr new_handler, proc_ptr *old_handler);/* * _CPU_Install_interrupt_stack * * This routine installs the hardware interrupt stack pointer. */void _CPU_Install_interrupt_stack( void );/* * _CPU_Context_switch * * This routine switches from the run context to the heir context. */void _CPU_Context_switch( Context_Control *run, Context_Control *heir);/* * _CPU_Context_save_fp * * This routine saves the floating point context passed to it. */void _CPU_Context_save_fp( void **fp_context_ptr);/* * _CPU_Context_restore_fp * * This routine restores the floating point context passed to it. */void _CPU_Context_restore_fp( void **fp_context_ptr);#if (M68K_HAS_FPSP_PACKAGE == 1)/* * Hooks for the Floating Point Support Package (FPSP) provided by Motorola * * NOTES: * * Motorola 68k family CPU's before the 68040 used a coprocessor * (68881 or 68882) to handle floating point. The 68040 has internal * floating point support -- but *not* the complete support provided by * the 68881 or 68882. The leftover functions are taken care of by the * M68040 Floating Point Support Package. Quoting from the MC68040 * Microprocessors User's Manual, Section 9, Floating-Point Unit (MC68040): * * "When used with the M68040FPSP, the MC68040 FPU is fully * compliant with IEEE floating-point standards." * * M68KFPSPInstallExceptionHandlers is in libcpu/m68k/MODEL/fpsp and * is invoked early in the application code to insure that proper FP * behavior is installed. This is not left to the BSP to call, since * this would force all applications using that BSP to use FPSP which * is not necessarily desirable. * * There is a similar package for the 68060 but RTEMS does not yet * support the 68060. */void M68KFPSPInstallExceptionHandlers (void);SCORE_EXTERN int (*_FPSP_install_raw_handler)( unsigned32 vector, proc_ptr new_handler, proc_ptr *old_handler);#endif#endif#ifdef __cplusplus}#endif#endif/* end of include file */
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