m2_0610.hier_info

在ALTERA公司的EPM570上实现的电机脉冲算法

aset => ~NO_FANOUT~
aload => ~NO_FANOUT~
sclr => ~NO_FANOUT~
sset => ~NO_FANOUT~
sload => ~NO_FANOUT~
q[0] <= dffs[0].DB_MAX_OUTPUT_PORT_TYPE


|ZHUHAI|QEP_CNT:inst9|LPM_INV1:inst1
data => lpm_inv:lpm_inv_component.data[0]
result <= lpm_inv:lpm_inv_component.result[0]


|ZHUHAI|QEP_CNT:inst9|LPM_INV1:inst1|lpm_inv:lpm_inv_component


|ZHUHAI|QEP_CNT:inst9|Filter:inst62
SIG_OUT <= LPM_OR3:inst6.result
SIG_IN => LPM_FD1:inst.data
FCK => LPM_FD1:inst.clock
FCK => LPM_FD1:inst2.clock
FCK => LPM_FD1:inst1.clock


|ZHUHAI|QEP_CNT:inst9|Filter:inst62|LPM_OR3:inst6
data0 => LPM_OR:lpm_or_component.DATA[0][0]
data1 => LPM_OR:lpm_or_component.DATA[1][0]
data2 => LPM_OR:lpm_or_component.DATA[2][0]
result <= LPM_OR:lpm_or_component.RESULT[0]


|ZHUHAI|QEP_CNT:inst9|Filter:inst62|LPM_OR3:inst6|LPM_OR:lpm_or_component
data[0][0] => or_node[0][1].IN1
data[1][0] => or_node[0][1].IN0
data[2][0] => or_node[0][2].IN0
result[0] <= or_node[0][2].DB_MAX_OUTPUT_PORT_TYPE


|ZHUHAI|QEP_CNT:inst9|Filter:inst62|LPM_AND2:inst3
data0 => LPM_AND:lpm_and_component.DATA[0][0]
data1 => LPM_AND:lpm_and_component.DATA[1][0]
result <= LPM_AND:lpm_and_component.RESULT[0]


|ZHUHAI|QEP_CNT:inst9|Filter:inst62|LPM_AND2:inst3|LPM_AND:lpm_and_component
data[0][0] => and_node[0][1].IN1
data[1][0] => and_node[0][1].IN0
result[0] <= and_node[0][1].DB_MAX_OUTPUT_PORT_TYPE


|ZHUHAI|QEP_CNT:inst9|Filter:inst62|LPM_FD1:inst
clock => lpm_ff:lpm_ff_component.clock
data => lpm_ff:lpm_ff_component.data[0]
q <= lpm_ff:lpm_ff_component.q[0]


|ZHUHAI|QEP_CNT:inst9|Filter:inst62|LPM_FD1:inst|lpm_ff:lpm_ff_component
data[0] => dffs[0].DATAIN
clock => dffs[0].CLK
enable => dffs[0].ENA
aclr => ~NO_FANOUT~
aset => ~NO_FANOUT~
aload => ~NO_FANOUT~
sclr => ~NO_FANOUT~
sset => ~NO_FANOUT~
sload => ~NO_FANOUT~
q[0] <= dffs[0].DB_MAX_OUTPUT_PORT_TYPE


|ZHUHAI|QEP_CNT:inst9|Filter:inst62|LPM_FD1:inst2
clock => lpm_ff:lpm_ff_component.clock
data => lpm_ff:lpm_ff_component.data[0]
q <= lpm_ff:lpm_ff_component.q[0]


|ZHUHAI|QEP_CNT:inst9|Filter:inst62|LPM_FD1:inst2|lpm_ff:lpm_ff_component
data[0] => dffs[0].DATAIN
clock => dffs[0].CLK
enable => dffs[0].ENA
aclr => ~NO_FANOUT~
aset => ~NO_FANOUT~
aload => ~NO_FANOUT~
sclr => ~NO_FANOUT~
sset => ~NO_FANOUT~
sload => ~NO_FANOUT~
q[0] <= dffs[0].DB_MAX_OUTPUT_PORT_TYPE


|ZHUHAI|QEP_CNT:inst9|Filter:inst62|LPM_AND2:inst4
data0 => LPM_AND:lpm_and_component.DATA[0][0]
data1 => LPM_AND:lpm_and_component.DATA[1][0]
result <= LPM_AND:lpm_and_component.RESULT[0]


|ZHUHAI|QEP_CNT:inst9|Filter:inst62|LPM_AND2:inst4|LPM_AND:lpm_and_component
data[0][0] => and_node[0][1].IN1
data[1][0] => and_node[0][1].IN0
result[0] <= and_node[0][1].DB_MAX_OUTPUT_PORT_TYPE


|ZHUHAI|QEP_CNT:inst9|Filter:inst62|LPM_FD1:inst1
clock => lpm_ff:lpm_ff_component.clock
data => lpm_ff:lpm_ff_component.data[0]
q <= lpm_ff:lpm_ff_component.q[0]


|ZHUHAI|QEP_CNT:inst9|Filter:inst62|LPM_FD1:inst1|lpm_ff:lpm_ff_component
data[0] => dffs[0].DATAIN
clock => dffs[0].CLK
enable => dffs[0].ENA
aclr => ~NO_FANOUT~
aset => ~NO_FANOUT~
aload => ~NO_FANOUT~
sclr => ~NO_FANOUT~
sset => ~NO_FANOUT~
sload => ~NO_FANOUT~
q[0] <= dffs[0].DB_MAX_OUTPUT_PORT_TYPE


|ZHUHAI|QEP_CNT:inst9|Filter:inst62|LPM_AND2:inst5
data0 => LPM_AND:lpm_and_component.DATA[0][0]
data1 => LPM_AND:lpm_and_component.DATA[1][0]
result <= LPM_AND:lpm_and_component.RESULT[0]


|ZHUHAI|QEP_CNT:inst9|Filter:inst62|LPM_AND2:inst5|LPM_AND:lpm_and_component
data[0][0] => and_node[0][1].IN1
data[1][0] => and_node[0][1].IN0
result[0] <= and_node[0][1].DB_MAX_OUTPUT_PORT_TYPE


|ZHUHAI|QEP_CNT:inst9|LPM_FD1:inst33
clock => lpm_ff:lpm_ff_component.clock
data => lpm_ff:lpm_ff_component.data[0]
q <= lpm_ff:lpm_ff_component.q[0]


|ZHUHAI|QEP_CNT:inst9|LPM_FD1:inst33|lpm_ff:lpm_ff_component
data[0] => dffs[0].DATAIN
clock => dffs[0].CLK
enable => dffs[0].ENA
aclr => ~NO_FANOUT~
aset => ~NO_FANOUT~
aload => ~NO_FANOUT~
sclr => ~NO_FANOUT~
sset => ~NO_FANOUT~
sload => ~NO_FANOUT~
q[0] <= dffs[0].DB_MAX_OUTPUT_PORT_TYPE


|ZHUHAI|QEP_CNT:inst9|LPM_INV1:inst20
data => lpm_inv:lpm_inv_component.data[0]
result <= lpm_inv:lpm_inv_component.result[0]


|ZHUHAI|QEP_CNT:inst9|LPM_INV1:inst20|lpm_inv:lpm_inv_component


|ZHUHAI|QEP_CNT:inst9|LPM_INV1:inst23
data => lpm_inv:lpm_inv_component.data[0]
result <= lpm_inv:lpm_inv_component.result[0]


|ZHUHAI|QEP_CNT:inst9|LPM_INV1:inst23|lpm_inv:lpm_inv_component


|ZHUHAI|QEP_CNT:inst9|LPM_FD1:inst8
clock => lpm_ff:lpm_ff_component.clock
data => lpm_ff:lpm_ff_component.data[0]
q <= lpm_ff:lpm_ff_component.q[0]


|ZHUHAI|QEP_CNT:inst9|LPM_FD1:inst8|lpm_ff:lpm_ff_component
data[0] => dffs[0].DATAIN
clock => dffs[0].CLK
enable => dffs[0].ENA
aclr => ~NO_FANOUT~
aset => ~NO_FANOUT~
aload => ~NO_FANOUT~
sclr => ~NO_FANOUT~
sset => ~NO_FANOUT~
sload => ~NO_FANOUT~
q[0] <= dffs[0].DB_MAX_OUTPUT_PORT_TYPE


|ZHUHAI|QEP_CNT:inst9|LPM_INV1:inst19
data => lpm_inv:lpm_inv_component.data[0]
result <= lpm_inv:lpm_inv_component.result[0]


|ZHUHAI|QEP_CNT:inst9|LPM_INV1:inst19|lpm_inv:lpm_inv_component


|ZHUHAI|QEP_CNT:inst9|LPM_INV1:inst29
data => lpm_inv:lpm_inv_component.data[0]
result <= lpm_inv:lpm_inv_component.result[0]


|ZHUHAI|QEP_CNT:inst9|LPM_INV1:inst29|lpm_inv:lpm_inv_component


|ZHUHAI|QEP_CNT:inst9|LPM_FD1:inst27
clock => lpm_ff:lpm_ff_component.clock
data => lpm_ff:lpm_ff_component.data[0]
q <= lpm_ff:lpm_ff_component.q[0]


|ZHUHAI|QEP_CNT:inst9|LPM_FD1:inst27|lpm_ff:lpm_ff_component
data[0] => dffs[0].DATAIN
clock => dffs[0].CLK
enable => dffs[0].ENA
aclr => ~NO_FANOUT~
aset => ~NO_FANOUT~
aload => ~NO_FANOUT~
sclr => ~NO_FANOUT~
sset => ~NO_FANOUT~
sload => ~NO_FANOUT~
q[0] <= dffs[0].DB_MAX_OUTPUT_PORT_TYPE


|ZHUHAI|QEP_CNT:inst9|LPM_INV1:inst32
data => lpm_inv:lpm_inv_component.data[0]
result <= lpm_inv:lpm_inv_component.result[0]


|ZHUHAI|QEP_CNT:inst9|LPM_INV1:inst32|lpm_inv:lpm_inv_component


|ZHUHAI|QEP_CNT:inst9|LPM_FD1:inst30
clock => lpm_ff:lpm_ff_component.clock
data => lpm_ff:lpm_ff_component.data[0]
q <= lpm_ff:lpm_ff_component.q[0]


|ZHUHAI|QEP_CNT:inst9|LPM_FD1:inst30|lpm_ff:lpm_ff_component
data[0] => dffs[0].DATAIN
clock => dffs[0].CLK
enable => dffs[0].ENA
aclr => ~NO_FANOUT~
aset => ~NO_FANOUT~
aload => ~NO_FANOUT~
sclr => ~NO_FANOUT~
sset => ~NO_FANOUT~
sload => ~NO_FANOUT~
q[0] <= dffs[0].DB_MAX_OUTPUT_PORT_TYPE


|ZHUHAI|QEP_CNT:inst9|LPM_INV1:inst26
data => lpm_inv:lpm_inv_component.data[0]
result <= lpm_inv:lpm_inv_component.result[0]


|ZHUHAI|QEP_CNT:inst9|LPM_INV1:inst26|lpm_inv:lpm_inv_component


|ZHUHAI|QEP_CNT:inst9|LPM_FD1:inst24
clock => lpm_ff:lpm_ff_component.clock
data => lpm_ff:lpm_ff_component.data[0]
q <= lpm_ff:lpm_ff_component.q[0]


|ZHUHAI|QEP_CNT:inst9|LPM_FD1:inst24|lpm_ff:lpm_ff_component
data[0] => dffs[0].DATAIN
clock => dffs[0].CLK
enable => dffs[0].ENA
aclr => ~NO_FANOUT~
aset => ~NO_FANOUT~
aload => ~NO_FANOUT~
sclr => ~NO_FANOUT~
sset => ~NO_FANOUT~
sload => ~NO_FANOUT~
q[0] <= dffs[0].DB_MAX_OUTPUT_PORT_TYPE


|ZHUHAI|QEP_CNT:inst9|LPM_INV1:inst9
data => lpm_inv:lpm_inv_component.data[0]
result <= lpm_inv:lpm_inv_component.result[0]


|ZHUHAI|QEP_CNT:inst9|LPM_INV1:inst9|lpm_inv:lpm_inv_component


|ZHUHAI|QEP_CNT:inst9|LPM_FD1:inst4
clock => lpm_ff:lpm_ff_component.clock
data => lpm_ff:lpm_ff_component.data[0]
q <= lpm_ff:lpm_ff_component.q[0]


|ZHUHAI|QEP_CNT:inst9|LPM_FD1:inst4|lpm_ff:lpm_ff_component
data[0] => dffs[0].DATAIN
clock => dffs[0].CLK
enable => dffs[0].ENA
aclr => ~NO_FANOUT~
aset => ~NO_FANOUT~
aload => ~NO_FANOUT~
sclr => ~NO_FANOUT~
sset => ~NO_FANOUT~
sload => ~NO_FANOUT~
q[0] <= dffs[0].DB_MAX_OUTPUT_PORT_TYPE


|ZHUHAI|QEP_CNT:inst9|LPM_INV1:inst15
data => lpm_inv:lpm_inv_component.data[0]
result <= lpm_inv:lpm_inv_component.result[0]


|ZHUHAI|QEP_CNT:inst9|LPM_INV1:inst15|lpm_inv:lpm_inv_component


|ZHUHAI|QEP_CNT:inst9|LPM_FD1:inst13
clock => lpm_ff:lpm_ff_component.clock
data => lpm_ff:lpm_ff_component.data[0]
q <= lpm_ff:lpm_ff_component.q[0]


|ZHUHAI|QEP_CNT:inst9|LPM_FD1:inst13|lpm_ff:lpm_ff_component
data[0] => dffs[0].DATAIN
clock => dffs[0].CLK
enable => dffs[0].ENA
aclr => ~NO_FANOUT~
aset => ~NO_FANOUT~
aload => ~NO_FANOUT~
sclr => ~NO_FANOUT~
sset => ~NO_FANOUT~
sload => ~NO_FANOUT~
q[0] <= dffs[0].DB_MAX_OUTPUT_PORT_TYPE


|ZHUHAI|QEP_CNT:inst9|LPM_INV1:inst18
data => lpm_inv:lpm_inv_component.data[0]
result <= lpm_inv:lpm_inv_component.result[0]


|ZHUHAI|QEP_CNT:inst9|LPM_INV1:inst18|lpm_inv:lpm_inv_component


|ZHUHAI|QEP_CNT:inst9|LPM_FD1:inst16
clock => lpm_ff:lpm_ff_component.clock
data => lpm_ff:lpm_ff_component.data[0]
q <= lpm_ff:lpm_ff_component.q[0]


|ZHUHAI|QEP_CNT:inst9|LPM_FD1:inst16|lpm_ff:lpm_ff_component
data[0] => dffs[0].DATAIN
clock => dffs[0].CLK
enable => dffs[0].ENA
aclr => ~NO_FANOUT~
aset => ~NO_FANOUT~
aload => ~NO_FANOUT~
sclr => ~NO_FANOUT~
sset => ~NO_FANOUT~
sload => ~NO_FANOUT~
q[0] <= dffs[0].DB_MAX_OUTPUT_PORT_TYPE


|ZHUHAI|QEP_CNT:inst9|LPM_INV1:inst12
data => lpm_inv:lpm_inv_component.data[0]
result <= lpm_inv:lpm_inv_component.result[0]


|ZHUHAI|QEP_CNT:inst9|LPM_INV1:inst12|lpm_inv:lpm_inv_component


|ZHUHAI|QEP_CNT:inst9|LPM_FD1:inst10
clock => lpm_ff:lpm_ff_component.clock
data => lpm_ff:lpm_ff_component.data[0]
q <= lpm_ff:lpm_ff_component.q[0]


|ZHUHAI|QEP_CNT:inst9|LPM_FD1:inst10|lpm_ff:lpm_ff_component
data[0] => dffs[0].DATAIN
clock => dffs[0].CLK
enable => dffs[0].ENA
aclr => ~NO_FANOUT~
aset => ~NO_FANOUT~
aload => ~NO_FANOUT~
sclr => ~NO_FANOUT~
sset => ~NO_FANOUT~
sload => ~NO_FANOUT~
q[0] <= dffs[0].DB_MAX_OUTPUT_PORT_TYPE


|ZHUHAI|QEP_CNT:inst9|LPM_FDCPE:inst34
aclr => lpm_ff:lpm_ff_component.aclr
aset => lpm_ff:lpm_ff_component.aset
clock => lpm_ff:lpm_ff_component.clock
data => lpm_ff:lpm_ff_component.data[0]
q <= lpm_ff:lpm_ff_component.q[0]


|ZHUHAI|QEP_CNT:inst9|LPM_FDCPE:inst34|lpm_ff:lpm_ff_component
data[0] => dffs[0].DATAIN
clock => dffs[0].CLK
enable => dffs[0].ENA
aload => ~NO_FANOUT~
sclr => ~NO_FANOUT~
sset => ~NO_FANOUT~
sload => ~NO_FANOUT~
q[0] <= dffs[0].DB_MAX_OUTPUT_PORT_TYPE


|ZHUHAI|LPM_FD8:inst38
clock => lpm_ff:lpm_ff_component.clock
data[0] => lpm_ff:lpm_ff_component.data[0]
data[1] => lpm_ff:lpm_ff_component.data[1]
data[2] => lpm_ff:lpm_ff_component.data[2]
data[3] => lpm_ff:lpm_ff_component.data[3]
data[4] => lpm_ff:lpm_ff_component.data[4]
data[5] => lpm_ff:lpm_ff_component.data[5]
data[6] => lpm_ff:lpm_ff_component.data[6]
data[7] => lpm_ff:lpm_ff_component.data[7]
q[0] <= lpm_ff:lpm_ff_component.q[0]
q[1] <= lpm_ff:lpm_ff_component.q[1]
q[2] <= lpm_ff:lpm_ff_component.q[2]
q[3] <= lpm_ff:lpm_ff_component.q[3]
q[4] <= lpm_ff:lpm_ff_component.q[4]
q[5] <= lpm_ff:lpm_ff_component.q[5]
q[6] <= lpm_ff:lpm_ff_component.q[6]
q[7] <= lpm_ff:lpm_ff_component.q[7]


|ZHUHAI|LPM_FD8:inst38|lpm_ff:lpm_ff_component
data[0] => dffs[0].DATAIN
data[1] => dffs[1].DATAIN
data[2] => dffs[2].DATAIN
data[3] => dffs[3].DATAIN
data[4] => dffs[4].DATAIN
data[5] => dffs[5].DATAIN
data[6] => dffs[6].DATAIN
data[7] => dffs[7].DATAIN
clock => dffs[7].CLK
clock => dffs[6].CLK
clock => dffs[5].CLK
clock => dffs[4].CLK
clock => dffs[3].CLK
clock => dffs[2].CLK
clock => dffs[1].CLK
clock => dffs[0].CLK
enable => dffs[7].ENA