m2_0610.vho

在ALTERA公司的EPM570上实现的电机脉冲算法

SIGNAL \inst39|lpm_ff_component|dffs[1]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst20|inst14|lpm_ff_component|dffs[0]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst20|inst14|lpm_ff_component|dffs[0]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst31|lpm_and_component|and_node[0][1]~98_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst31|lpm_and_component|and_node[0][1]~98_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst19|lpm_or_component|or_node[0][1]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst19|lpm_or_component|or_node[0][1]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst35|inst1|lpm_ff_component|dffs[0]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst35|inst1|lpm_ff_component|dffs[0]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst26|lpm_or_component|or_node[0][1]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst26|lpm_or_component|or_node[0][1]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst38|lpm_ff_component|dffs[0]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst38|lpm_ff_component|dffs[0]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst15~88_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst15~88_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst58|lpm_or_component|or_node[0][1]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst58|lpm_or_component|or_node[0][1]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst2|lpm_ff_component|dffs[6]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst2|lpm_ff_component|dffs[6]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst2|lpm_ff_component|dffs[7]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst2|lpm_ff_component|dffs[7]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst2|lpm_ff_component|dffs[5]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst2|lpm_ff_component|dffs[5]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst79|lpm_and_component|and_node[0][1]~93_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst79|lpm_and_component|and_node[0][1]~93_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst|lpm_decode_component|auto_generated|w_anode108w[3]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst|lpm_decode_component|auto_generated|w_anode108w[3]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \RD~I_modesel\ : std_logic_vector(7 DOWNTO 0);
SIGNAL \inst9|inst35~503_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst9|inst35~503_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst9|inst21~503_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst9|inst21~503_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst9|inst34|lpm_ff_component|dffs[0]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst9|inst34|lpm_ff_component|dffs[0]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella0_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella0_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella1_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella1_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella2_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella2_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella3_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella3_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella4_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella4_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella5_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella5_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella6_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella6_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella7_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella7_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella0_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella0_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella1_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella1_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella2_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella2_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella3_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella3_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella4_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella4_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella5_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella5_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella6_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella6_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella7_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella7_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst40|lpm_ff_component|dffs[7]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst40|lpm_ff_component|dffs[7]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst67|lpm_ff_component|dffs[7]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst67|lpm_ff_component|dffs[7]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst77|lpm_bustri_component|dout[7]~1414_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst77|lpm_bustri_component|dout[7]~1414_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst77|lpm_bustri_component|dout[7]~1468_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst77|lpm_bustri_component|dout[7]~1468_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst34|lpm_and_component|and_node[0][1]~79_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst34|lpm_and_component|and_node[0][1]~79_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella8_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella8_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella9_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella9_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella10_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella10_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella11_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella11_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella12_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella12_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella13_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella13_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella14_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella14_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella15_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst59|lpm_counter_component|auto_generated|counter_cella15_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst|lpm_decode_component|auto_generated|w_anode101w[1]~28_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst|lpm_decode_component|auto_generated|w_anode101w[1]~28_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst79|lpm_and_component|and_node[0][1]~92_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst79|lpm_and_component|and_node[0][1]~92_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst79|lpm_and_component|and_node[0][1]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst79|lpm_and_component|and_node[0][1]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL inst15_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL inst15_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL \SIN~I_modesel\ : std_logic_vector(7 DOWNTO 0);
SIGNAL \CIN6~I_modesel\ : std_logic_vector(7 DOWNTO 0);
SIGNAL \inst78|lpm_and_component|and_node[0][1]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst78|lpm_and_component|and_node[0][1]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \CIN5~I_modesel\ : std_logic_vector(7 DOWNTO 0);
SIGNAL \inst31|lpm_and_component|and_node[0][1]~99_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst31|lpm_and_component|and_node[0][1]~99_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \CIN4~I_modesel\ : std_logic_vector(7 DOWNTO 0);
SIGNAL \inst40|lpm_ff_component|dffs[3]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst40|lpm_ff_component|dffs[3]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \CIN3~I_modesel\ : std_logic_vector(7 DOWNTO 0);
SIGNAL \inst40|lpm_ff_component|dffs[2]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst40|lpm_ff_component|dffs[2]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \CIN2~I_modesel\ : std_logic_vector(7 DOWNTO 0);
SIGNAL \inst40|lpm_ff_component|dffs[1]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst40|lpm_ff_component|dffs[1]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \CIN1~I_modesel\ : std_logic_vector(7 DOWNTO 0);
SIGNAL \inst40|lpm_ff_component|dffs[0]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst40|lpm_ff_component|dffs[0]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL inst25_modesel : std_logic_vector(7 DOWNTO 0);
SIGNAL \inst74|lpm_and_component|and_node[0][1]~46_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst74|lpm_and_component|and_node[0][1]~46_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst71|lpm_and_component|and_node[0][1]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst71|lpm_and_component|and_node[0][1]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella8_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella8_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst74|lpm_and_component|and_node[0][1]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst74|lpm_and_component|and_node[0][1]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst67|lpm_ff_component|dffs[8]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst67|lpm_ff_component|dffs[8]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst28|lpm_shiftreg_component|dffs[0]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst28|lpm_shiftreg_component|dffs[0]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella9_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella9_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst67|lpm_ff_component|dffs[9]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst67|lpm_ff_component|dffs[9]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst28|lpm_shiftreg_component|dffs[1]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst28|lpm_shiftreg_component|dffs[1]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella10_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella10_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst67|lpm_ff_component|dffs[10]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst67|lpm_ff_component|dffs[10]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst28|lpm_shiftreg_component|dffs[2]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst28|lpm_shiftreg_component|dffs[2]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella11_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella11_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst67|lpm_ff_component|dffs[11]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst67|lpm_ff_component|dffs[11]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst28|lpm_shiftreg_component|dffs[3]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst28|lpm_shiftreg_component|dffs[3]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst28|lpm_shiftreg_component|dffs[4]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst28|lpm_shiftreg_component|dffs[4]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst28|lpm_shiftreg_component|dffs[5]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst28|lpm_shiftreg_component|dffs[5]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst28|lpm_shiftreg_component|dffs[6]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst28|lpm_shiftreg_component|dffs[6]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst28|lpm_shiftreg_component|dffs[7]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst28|lpm_shiftreg_component|dffs[7]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella12_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella12_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella13_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella13_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella14_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella14_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella15_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst66|lpm_counter_component|auto_generated|counter_cella15_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst67|lpm_ff_component|dffs[15]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst67|lpm_ff_component|dffs[15]_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \SERDY1~I_modesel\ : std_logic_vector(7 DOWNTO 0);
SIGNAL \inst70|lpm_and_component|and_node[0][1]_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst70|lpm_and_component|and_node[0][1]_pathsel\ : std_logic_vector(10 DOWNTO 0);