m2_0610_vhd.sdo

在ALTERA公司的EPM570上实现的电机脉冲算法

// Copyright (C) 1991-2007 Altera Corporation
// Your use of Altera Corporation's design tools, logic functions 
// and other software and tools, and its AMPP partner logic 
// functions, and any output files from any of the foregoing 
// (including device programming or simulation files), and any 
// associated documentation or information are expressly subject 
// to the terms and conditions of the Altera Program License 
// Subscription Agreement, Altera MegaCore Function License 
// Agreement, or other applicable license agreement, including, 
// without limitation, that your use is for the sole purpose of 
// programming logic devices manufactured by Altera and sold by 
// Altera or its authorized distributors.  Please refer to the 
// applicable agreement for further details.


// 
// Device: Altera EPM240T100C5 Package TQFP100
// 

// 
// This SDF file should be used for Active-HDL (VHDL) only
// 

(DELAYFILE
  (SDFVERSION "2.1")
  (DESIGN "ZHUHAI")
  (DATE "10/16/2007 22:38:31")
  (VENDOR "Altera")
  (PROGRAM "Quartus II")
  (VERSION "Version 7.1 Build 156 04/30/2007 SJ Full Version")
  (DIVIDER .)
  (TIMESCALE 1 ps)

  (CELL
    (CELLTYPE "maxii_asynch_lcell")
    (INSTANCE \\inst37\|lpm_counter_component\|auto_generated\|counter_cella5\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datab (908:908:908) (882:882:882))
        (IOPATH datab regin (1061:1061:1061) (1061:1061:1061))
        (IOPATH cin regin (1626:1626:1626) (1626:1626:1626))
        (IOPATH datab cout0 (747:747:747) (747:747:747))
        (IOPATH datab cout1 (743:743:743) (743:743:743))
      )
    )
  )
  (CELL
    (CELLTYPE "maxii_lcell_register")
    (INSTANCE \\inst37\|lpm_counter_component\|auto_generated\|counter_cella5\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (1372:1372:1372) (1372:1372:1372))
        (PORT clk (2185:2185:2185) (1713:1713:1713))
        (IOPATH (posedge clk) regout (376:376:376) (376:376:376))
        (IOPATH (posedge aclr) regout (577:577:577) (577:577:577))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (333:333:333))
      (HOLD datain (posedge clk) (221:221:221))
    )
  )
  (CELL
    (CELLTYPE "maxii_io")
    (INSTANCE \\CLKIN\~I\\)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1163:1163:1163) (1163:1163:1163))
      )
    )
  )
  (CELL
    (CELLTYPE "maxii_asynch_lcell")
    (INSTANCE \\inst9\|inst\|lpm_ff_component\|dffs\[0\]\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datad (2851:2851:2851) (2821:2821:2821))
        (IOPATH datad regin (591:591:591) (591:591:591))
      )
    )
  )
  (CELL
    (CELLTYPE "maxii_lcell_register")
    (INSTANCE \\inst9\|inst\|lpm_ff_component\|dffs\[0\]\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (1372:1372:1372) (1372:1372:1372))
        (PORT clk (5403:5403:5403) (5382:5382:5382))
        (IOPATH (posedge clk) regout (376:376:376) (376:376:376))
        (IOPATH (posedge aclr) regout (577:577:577) (577:577:577))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (333:333:333))
      (HOLD datain (posedge clk) (221:221:221))
    )
  )
  (CELL
    (CELLTYPE "maxii_asynch_lcell")
    (INSTANCE \\inst35\|inst\|lpm_counter_component\|auto_generated\|cout_bit\\.lecomb)
    (DELAY
      (ABSOLUTE
        (IOPATH cin combout (975:975:975) (975:975:975))
        (IOPATH cin0 combout (815:815:815) (815:815:815))
        (IOPATH cin1 combout (804:804:804) (804:804:804))
      )
    )
  )
  (CELL
    (CELLTYPE "maxii_asynch_lcell")
    (INSTANCE \\inst20\|inst16\|lpm_ff_component\|dffs\[0\]\\.lecomb)
    (DELAY
      (ABSOLUTE
        (IOPATH cin regin (1367:1367:1367) (1367:1367:1367))
        (IOPATH cin0 regin (1161:1161:1161) (1161:1161:1161))
        (IOPATH cin1 regin (1150:1150:1150) (1150:1150:1150))
        (IOPATH cin combout (975:975:975) (975:975:975))
        (IOPATH cin0 combout (815:815:815) (815:815:815))
        (IOPATH cin1 combout (804:804:804) (804:804:804))
      )
    )
  )
  (CELL
    (CELLTYPE "maxii_lcell_register")
    (INSTANCE \\inst20\|inst16\|lpm_ff_component\|dffs\[0\]\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (1372:1372:1372) (1372:1372:1372))
        (PORT clk (1713:1713:1713) (2185:2185:2185))
        (IOPATH (posedge clk) regout (376:376:376) (376:376:376))
        (IOPATH (posedge aclr) regout (577:577:577) (577:577:577))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (333:333:333))
      (HOLD datain (posedge clk) (221:221:221))
    )
  )
  (CELL
    (CELLTYPE "maxii_asynch_lcell")
    (INSTANCE \\inst35\|inst\|lpm_counter_component\|auto_generated\|counter_cella7\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datab (1978:1978:1978) (1882:1882:1882))
        (IOPATH datab regin (1061:1061:1061) (1061:1061:1061))
        (IOPATH cin regin (1367:1367:1367) (1367:1367:1367))
        (IOPATH cin0 regin (1161:1161:1161) (1161:1161:1161))
        (IOPATH cin1 regin (1150:1150:1150) (1150:1150:1150))
        (IOPATH datab cout0 (747:747:747) (747:747:747))
        (IOPATH cin0 cout0 (123:123:123) (123:123:123))
        (IOPATH datab cout1 (743:743:743) (743:743:743))
        (IOPATH cin1 cout1 (111:111:111) (111:111:111))
      )
    )
  )
  (CELL
    (CELLTYPE "maxii_lcell_register")
    (INSTANCE \\inst35\|inst\|lpm_counter_component\|auto_generated\|counter_cella7\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (3634:3634:3634) (3697:3697:3697))
        (PORT clk (2782:2782:2782) (2674:2674:2674))
        (IOPATH (posedge clk) regout (376:376:376) (376:376:376))
        (IOPATH (posedge aclr) regout (577:577:577) (577:577:577))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (333:333:333))
      (HOLD datain (posedge clk) (221:221:221))
    )
  )
  (CELL
    (CELLTYPE "maxii_asynch_lcell")
    (INSTANCE \\inst20\|inst7\|lpm_counter_component\|auto_generated\|counter_cella15\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (1928:1928:1928) (1841:1841:1841))
        (PORT datac (2086:2086:2086) (1968:1968:1968))
        (IOPATH dataa regin (1183:1183:1183) (1183:1183:1183))
        (IOPATH cin regin (1367:1367:1367) (1367:1367:1367))
        (IOPATH cin0 regin (1161:1161:1161) (1161:1161:1161))
        (IOPATH cin1 regin (1150:1150:1150) (1150:1150:1150))
        (IOPATH dataa cout0 (978:978:978) (978:978:978))
        (IOPATH cin0 cout0 (123:123:123) (123:123:123))
        (IOPATH dataa cout1 (973:973:973) (973:973:973))
        (IOPATH cin1 cout1 (111:111:111) (111:111:111))
      )
    )
  )
  (CELL
    (CELLTYPE "maxii_lcell_register")
    (INSTANCE \\inst20\|inst7\|lpm_counter_component\|auto_generated\|counter_cella15\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT sload (2996:2996:2996) (2972:2972:2972))
        (PORT datac (2366:2366:2366) (2248:2248:2248))
        (PORT aclr (1372:1372:1372) (1372:1372:1372))
        (PORT clk (2185:2185:2185) (1713:1713:1713))
        (PORT ena (5152:5152:5152) (5161:5161:5161))
        (IOPATH (posedge clk) regout (376:376:376) (376:376:376))
        (IOPATH (posedge aclr) regout (577:577:577) (577:577:577))
      )
    )
    (TIMINGCHECK
      (SETUP datac (posedge clk) (333:333:333))
      (SETUP datain (posedge clk) (333:333:333))
      (SETUP sload (posedge clk) (333:333:333))
      (SETUP ena (posedge clk) (333:333:333))
      (HOLD datac (posedge clk) (221:221:221))
      (HOLD datain (posedge clk) (221:221:221))
      (HOLD sload (posedge clk) (221:221:221))
      (HOLD ena (posedge clk) (221:221:221))
    )
  )
  (CELL
    (CELLTYPE "maxii_asynch_lcell")
    (INSTANCE \\inst37\|lpm_counter_component\|auto_generated\|counter_cella10\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (883:883:883) (875:875:875))
        (IOPATH dataa regin (1183:1183:1183) (1183:1183:1183))
        (IOPATH cin regin (1367:1367:1367) (1367:1367:1367))
      )
    )
  )
  (CELL
    (CELLTYPE "maxii_lcell_register")
    (INSTANCE \\inst37\|lpm_counter_component\|auto_generated\|counter_cella10\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (1372:1372:1372) (1372:1372:1372))
        (PORT clk (2185:2185:2185) (1713:1713:1713))
        (IOPATH (posedge clk) regout (376:376:376) (376:376:376))
        (IOPATH (posedge aclr) regout (577:577:577) (577:577:577))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (333:333:333))
      (HOLD datain (posedge clk) (221:221:221))
    )
  )
  (CELL
    (CELLTYPE "maxii_asynch_lcell")
    (INSTANCE \\inst35\|inst\|lpm_counter_component\|auto_generated\|counter_cella6\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (1744:1744:1744) (1698:1698:1698))
        (IOPATH dataa regin (1183:1183:1183) (1183:1183:1183))
        (IOPATH cin regin (1367:1367:1367) (1367:1367:1367))
        (IOPATH cin0 regin (1161:1161:1161) (1161:1161:1161))
        (IOPATH cin1 regin (1150:1150:1150) (1150:1150:1150))
        (IOPATH dataa cout0 (978:978:978) (978:978:978))
        (IOPATH cin0 cout0 (123:123:123) (123:123:123))
        (IOPATH dataa cout1 (973:973:973) (973:973:973))
        (IOPATH cin1 cout1 (111:111:111) (111:111:111))
      )
    )
  )
  (CELL
    (CELLTYPE "maxii_lcell_register")
    (INSTANCE \\inst35\|inst\|lpm_counter_component\|auto_generated\|counter_cella6\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (3634:3634:3634) (3697:3697:3697))
        (PORT clk (2782:2782:2782) (2674:2674:2674))
        (IOPATH (posedge clk) regout (376:376:376) (376:376:376))
        (IOPATH (posedge aclr) regout (577:577:577) (577:577:577))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (333:333:333))
      (HOLD datain (posedge clk) (221:221:221))
    )
  )
  (CELL
    (CELLTYPE "maxii_asynch_lcell")
    (INSTANCE \\inst20\|inst17\|lpm_ff_component\|dffs\[15\]\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (953:953:953) (906:906:906))
      )
    )
  )
  (CELL
    (CELLTYPE "maxii_lcell_register")
    (INSTANCE \\inst20\|inst17\|lpm_ff_component\|dffs\[15\]\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT datac (1233:1233:1233) (1186:1186:1186))
        (PORT aclr (1372:1372:1372) (1372:1372:1372))
        (PORT clk (7561:7561:7561) (7581:7581:7581))
        (IOPATH (posedge clk) regout (376:376:376) (376:376:376))
        (IOPATH (posedge aclr) regout (577:577:577) (577:577:577))
      )
    )
    (TIMINGCHECK
      (SETUP datac (posedge clk) (333:333:333))
      (SETUP datain (posedge clk) (333:333:333))
      (HOLD datac (posedge clk) (221:221:221))
      (HOLD datain (posedge clk) (221:221:221))
    )
  )
  (CELL
    (CELLTYPE "maxii_asynch_lcell")
    (INSTANCE \\inst20\|inst\|lpm_ff_component\|dffs\[0\]\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (2731:2731:2731) (2661:2661:2661))
        (PORT datad (1976:1976:1976) (1893:1893:1893))
        (IOPATH datad combout (200:200:200) (200:200:200))
        (IOPATH qfbkin combout (595:595:595) (595:595:595))
      )
    )
  )
  (CELL
    (CELLTYPE "maxii_lcell_register")
    (INSTANCE \\inst20\|inst\|lpm_ff_component\|dffs\[0\]\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT datac (3011:3011:3011) (2941:2941:2941))
        (PORT aclr (1372:1372:1372) (1372:1372:1372))
        (PORT clk (1713:1713:1713) (2185:2185:2185))
        (IOPATH (posedge clk) regout (376:376:376) (376:376:376))
        (IOPATH (posedge aclr) regout (577:577:577) (577:577:577))
        (IOPATH (posedge clk) qfbkout (376:376:376) (376:376:376))
        (IOPATH (posedge aclr) qfbkout (577:577:577) (577:577:577))
      )
    )
    (TIMINGCHECK
      (SETUP datac (posedge clk) (333:333:333))
      (SETUP datain (posedge clk) (333:333:333))
      (HOLD datac (posedge clk) (221:221:221))
      (HOLD datain (posedge clk) (221:221:221))
    )
  )
  (CELL
    (CELLTYPE "maxii_asynch_lcell")
    (INSTANCE \\inst39\|lpm_ff_component\|dffs\[0\]\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datad (4950:4950:4950) (4584:4584:4584))
        (IOPATH datad regin (591:591:591) (591:591:591))
      )
    )
  )
  (CELL
    (CELLTYPE "maxii_lcell_register")
    (INSTANCE \\inst39\|lpm_ff_component\|dffs\[0\]\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (1372:1372:1372) (1372:1372:1372))
        (PORT clk (2057:2057:2057) (2055:2055:2055))
        (IOPATH (posedge clk) regout (376:376:376) (376:376:376))
        (IOPATH (posedge aclr) regout (577:577:577) (577:577:577))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (333:333:333))
      (HOLD datain (posedge clk) (221:221:221))
    )