📄 adc.fit.rpt
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+-------------------------------------------------+
; Interconnect Usage Summary ;
+----------------------------+--------------------+
; Interconnect Resource Type ; Usage ;
+----------------------------+--------------------+
; Output enables ; 0 / 6 ( 0 % ) ;
; PIA buffers ; 123 / 288 ( 42 % ) ;
; PIAs ; 127 / 288 ( 44 % ) ;
+----------------------------+--------------------+
+-----------------------------------------------------------------------------+
; LAB External Interconnect ;
+-----------------------------------------------+-----------------------------+
; LAB External Interconnects (Average = 15.88) ; Number of LABs (Total = 7) ;
+-----------------------------------------------+-----------------------------+
; 0 - 2 ; 1 ;
; 3 - 5 ; 1 ;
; 6 - 8 ; 0 ;
; 9 - 11 ; 1 ;
; 12 - 14 ; 0 ;
; 15 - 17 ; 1 ;
; 18 - 20 ; 1 ;
; 21 - 23 ; 1 ;
; 24 - 26 ; 1 ;
; 27 - 29 ; 1 ;
+-----------------------------------------------+-----------------------------+
+-----------------------------------------------------------------------+
; LAB Macrocells ;
+-----------------------------------------+-----------------------------+
; Number of Macrocells (Average = 11.00) ; Number of LABs (Total = 7) ;
+-----------------------------------------+-----------------------------+
; 0 ; 1 ;
; 1 ; 0 ;
; 2 ; 0 ;
; 3 ; 0 ;
; 4 ; 1 ;
; 5 ; 0 ;
; 6 ; 1 ;
; 7 ; 0 ;
; 8 ; 0 ;
; 9 ; 0 ;
; 10 ; 0 ;
; 11 ; 0 ;
; 12 ; 0 ;
; 13 ; 0 ;
; 14 ; 1 ;
; 15 ; 0 ;
; 16 ; 4 ;
+-----------------------------------------+-----------------------------+
+---------------------------------------------------------+
; Parallel Expander ;
+--------------------------+------------------------------+
; Parallel Expander Length ; Number of Parallel Expanders ;
+--------------------------+------------------------------+
; 0 ; 0 ;
; 1 ; 12 ;
; 2 ; 1 ;
+--------------------------+------------------------------+
+-------------------------------------------------------------------------------+
; Shareable Expander ;
+-------------------------------------------------+-----------------------------+
; Number of shareable expanders (Average = 2.25) ; Number of LABs (Total = 5) ;
+-------------------------------------------------+-----------------------------+
; 0 ; 3 ;
; 1 ; 1 ;
; 2 ; 1 ;
; 3 ; 1 ;
; 4 ; 0 ;
; 5 ; 1 ;
; 6 ; 0 ;
; 7 ; 1 ;
+-------------------------------------------------+-----------------------------+
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Logic Cell Interconnection ;
+-----+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LAB ; Logic Cell ; Input ; Output ;
+-----+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; A ; LC12 ; lddat_reg[5]~263, shuma[0]~79, shuma[1]~67, shuma[2]~71, shuma[3]~75 ; lddat_reg[5]~263 ;
; A ; LC9 ; ; lddat[7] ;
; A ; LC16 ; reduce_or~400, lddat_reg[3]~267, lddat_reg~208, shuma[2]~71, shuma[0]~79, shuma[1]~67, shuma[3]~75 ; lddat_reg[3]~267, lddat[3] ;
; A ; LC13 ; lddat_reg[5]~275, reduce_or~400, lddat_reg[5]~263, shuma[2]~71, shuma[3]~75, shuma[0]~79, shuma[1]~67 ; lddat_reg[5]~263, lddat[5], lddat_reg[5]~275 ;
; A ; LC11 ; reduce_or~400, lddat_reg[6]~259, reduce_or~409sexp2, reduce_or~409sexp3, reduce_or~409sexp4, shuma[3]~75 ; lddat_reg[6]~259, lddat[6] ;
; A ; LC14 ; reduce_or~405, reduce_or~400, lddat_reg[4]~241 ; lddat_reg[4]~241, lddat[4] ;
; B ; LC29 ; count[7], shuchuu[7] ; count[7], count[0], count[1], count[2], count[5], count[6], count[8], count[9], count[3], count[4], count~651, count~657, count~660 ;
; B ; LC30 ; count[6], shuchuu[6] ; count[7], count[0], count[1], count[2], count[5], count[6], count[8], count[9], count[3], count[4], count~645, count~663, count~669, count~683 ;
; B ; LC26 ; clk, count~645, count[10], nop, count[7], count[11], LessThan~631, LessThan~632, LessThan~617, LessThan~614sexp, LessThan~616sexp, lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|sout_node[3]~22, LessThan~611, count[8], count[9], count[6], shuchuu[6], shuchuu[7] ; LessThan~611, LessThan~617, count[7], lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|sout_node[3]~22, lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|sout_node[0]~0, count[9], count~645, LessThan~614sexp, count[1], count[2], count[8], count~651, count~657, count~660, count~677, Select~392, count[5], count[6], count[4], LessThan~641 ;
; B ; LC19 ; clk, count~660, count[3], nop, count[0], count[1], count[8], count[9], count[10], count[11], LessThan~617, LessThan~631, LessThan~632, count[2], count[7], shuchuu[7], count[6], shuchuu[6] ; LessThan~611, LessThan~624, LessThan~631, count[0], count[2], lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|sout_node[1]~15, lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|sout_node[2]~16, lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|sout_node[3]~22, lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|sout_node[0]~0, count[9], Select~391, LessThan~636, count~651, lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|sout_node[1]~34, lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|sout_node[0]~36, count~677, lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|sout_node[0]~33sexp1, lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|sout_node[0]~33sexp3, count[3] ;
; B ; LC21 ; clk, count~663, count[10], nop, count[5], count[11], LessThan~631, LessThan~632, LessThan~617, LessThan~614sexp, LessThan~616sexp, lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|sout_node[1]~15, LessThan~611, count[8], count[9], count[6], shuchuu[6], count[7], shuchuu[7] ; LessThan~611, LessThan~621, lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|sout_node[1]~15, count[5], lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|sout_node[2]~16, lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|sout_node[3]~22, lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|sout_node[0]~0, count[9], LessThan~636, LessThan~639, lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|sout_node[1]~34, count~663, lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|sout_node[0]~36, Select~390 ;
; B ; LC17 ; count[2], count[5], count[4], count[3], count[1], count[0], count[6] ; count[6] ;
; B ; LC28 ; clk, count~669, count[10], nop, count[6], count[11], LessThan~631, LessThan~632, LessThan~617, LessThan~614sexp, LessThan~616sexp, lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|sout_node[2]~16, LessThan~611, count[8], count[9], shuchuu[6], count[7], shuchuu[7] ; LessThan~611, LessThan~632, lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|sout_node[2]~16, count[6], lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|sout_node[3]~22, lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|sout_node[0]~0, count[9], LessThan~636, count~669, lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|sout_node[0]~36, LessThan~616sexp, count[0], count[1], count[2], count[8], count~651, count~657, count~660, Select~391, count[7], count[5], count[3], count[4], LessThan~642 ;
; B ; LC32 ; count[2], count[6], count[5], count[4], count[3], count[1], count[0], count[7] ⌨️ 快捷键说明
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