hongwai.map.qmsg

通过VERILOG HDL语言使用CPLD连接PS2键盘

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 168 06/22/2005 Service Pack 1 SJ Full Version " "Info: Version 5.0 Build 168 06/22/2005 Service Pack 1 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Jul 05 23:45:33 2007 " "Info: Processing started: Thu Jul 05 23:45:33 2007" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off hongwai -c hongwai " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off hongwai -c hongwai" {  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "hongwai.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file hongwai.v" { { "Info" "ISGN_ENTITY_NAME" "1 hongwai " "Info: Found entity 1: hongwai" {  } { { "hongwai.v" "" { Text "C:/altera/quartus50/hongwai/hongwai.v" 1 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "hongwai " "Info: Elaborating entity \"hongwai\" for the top level hierarchy" {  } {  } 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "led\[1\] VCC " "Warning: Pin \"led\[1\]\" stuck at VCC" {  } { { "hongwai.v" "" { Text "C:/altera/quartus50/hongwai/hongwai.v" 2 -1 0 } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "led\[3\] VCC " "Warning: Pin \"led\[3\]\" stuck at VCC" {  } { { "hongwai.v" "" { Text "C:/altera/quartus50/hongwai/hongwai.v" 2 -1 0 } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "led\[5\] VCC " "Warning: Pin \"led\[5\]\" stuck at VCC" {  } { { "hongwai.v" "" { Text "C:/altera/quartus50/hongwai/hongwai.v" 2 -1 0 } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "led\[7\] VCC " "Warning: Pin \"led\[7\]\" stuck at VCC" {  } { { "hongwai.v" "" { Text "C:/altera/quartus50/hongwai/hongwai.v" 2 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "17 " "Info: Implemented 17 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "1 " "Info: Implemented 1 input pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_OPINS" "8 " "Info: Implemented 8 output pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_MCELLS" "8 " "Info: Implemented 8 macrocells" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 5 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 5 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Thu Jul 05 23:45:35 2007 " "Info: Processing ended: Thu Jul 05 23:45:35 2007" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Info: Elapsed time: 00:00:03" {  } {  } 0}  } {  } 0}