led6.fit.rpt

通过VERILOG HDL语言使用CPLD连接PS2键盘

+--------------------------------------------------------------------------------------------------+
; I/O Standard                                                                                     ;
+--------------+------------+----------------------+-------------------+-------------------+-------+
; I/O Standard ; Input Vref ; Dedicated Input Pins ; Pins in I/O Bank1 ; Pins in I/O Bank2 ; Total ;
+--------------+------------+----------------------+-------------------+-------------------+-------+
; LVTTL        ; -          ; 1                    ; 0                 ; 0                 ; 1     ;
+--------------+------------+----------------------+-------------------+-------------------+-------+


+---------------------------------------------------------------------+
; Dedicated Inputs I/O                                                ;
+-------+-------+-------+-------+--------------+------------+---------+
; Name  ; Pin # ; Type  ; VCCIO ; I/O Standard ; Input Vref ; Current ;
+-------+-------+-------+-------+--------------+------------+---------+
; clock ; 87    ; Input ; --    ; LVTTL        ; -          ; 0 mA    ;
+-------+-------+-------+-------+--------------+------------+---------+


+-----------------------------------------------+
; Output Pin Default Load For Reported TCO      ;
+--------------+-------+------------------------+
; I/O Standard ; Load  ; Termination Resistance ;
+--------------+-------+------------------------+
; LVTTL        ; 10 pF ; Not Available          ;
; LVCMOS       ; 10 pF ; Not Available          ;
; 3.3-V PCI    ; 10 pF ; 25 Ohm (Parallel)      ;
; 2.5 V        ; 10 pF ; Not Available          ;
+--------------+-------+------------------------+
Note: User assignments will override these defaults. The user specified values are listed in the Output Pins and Bidir Pins tables.


+----------------------------------------------------------------------------------+
; Fitter Resource Utilization by Entity                                            ;
+------------------------------+------------+------+-------------------------------+
; Compilation Hierarchy Node   ; Macrocells ; Pins ; Full Hierarchy Name           ;
+------------------------------+------------+------+-------------------------------+
; |led6                        ; 42         ; 19   ; |led6                         ;
;    |lpm_counter:count_rtl_0| ; 28         ; 0    ; |led6|lpm_counter:count_rtl_0 ;
+------------------------------+------------+------+-------------------------------+


+---------------------------------------------------------------------------------------+
; Control Signals                                                                       ;
+-------+----------+---------+-------+--------+----------------------+------------------+
; Name  ; Location ; Fan-Out ; Usage ; Global ; Global Resource Used ; Global Line Name ;
+-------+----------+---------+-------+--------+----------------------+------------------+
; clock ; PIN_87   ; 28      ; Clock ; yes    ; On                   ; --               ;
+-------+----------+---------+-------+--------+----------------------+------------------+


+----------------------------------------------------------------------+
; Global & Other Fast Signals                                          ;
+-------+----------+---------+----------------------+------------------+
; Name  ; Location ; Fan-Out ; Global Resource Used ; Global Line Name ;
+-------+----------+---------+----------------------+------------------+
; clock ; PIN_87   ; 28      ; On                   ; --               ;
+-------+----------+---------+----------------------+------------------+


+--------------------------------------------+
; Non-Global High Fan-Out Signals            ;
+----------------------------------+---------+
; Name                             ; Fan-Out ;
+----------------------------------+---------+
; lpm_counter:count_rtl_0|dffs[1]  ; 27      ;
; lpm_counter:count_rtl_0|dffs[0]  ; 27      ;
; lpm_counter:count_rtl_0|dffs[2]  ; 26      ;
; lpm_counter:count_rtl_0|dffs[3]  ; 25      ;
; lpm_counter:count_rtl_0|dffs[4]  ; 24      ;
; lpm_counter:count_rtl_0|dffs[5]  ; 23      ;
; lpm_counter:count_rtl_0|dffs[6]  ; 22      ;
; lpm_counter:count_rtl_0|dffs[7]  ; 21      ;
; lpm_counter:count_rtl_0|dffs[9]  ; 19      ;
; lpm_counter:count_rtl_0|dffs[8]  ; 19      ;
; lpm_counter:count_rtl_0|dffs[10] ; 18      ;
; lpm_counter:count_rtl_0|dffs[11] ; 17      ;
; lpm_counter:count_rtl_0|dffs[12] ; 16      ;
; lpm_counter:count_rtl_0|dffs[13] ; 15      ;
; lpm_counter:count_rtl_0|dffs[14] ; 14      ;
; lpm_counter:count_rtl_0|dffs[15] ; 13      ;
; lpm_counter:count_rtl_0|dffs[17] ; 11      ;
; lpm_counter:count_rtl_0|dffs[16] ; 11      ;
; lpm_counter:count_rtl_0|dffs[25] ; 10      ;
; lpm_counter:count_rtl_0|dffs[24] ; 10      ;
; lpm_counter:count_rtl_0|dffs[18] ; 10      ;
; lpm_counter:count_rtl_0|dffs[26] ; 9       ;
; lpm_counter:count_rtl_0|dffs[19] ; 9       ;
; lpm_counter:count_rtl_0|dffs[27] ; 8       ;
; lpm_counter:count_rtl_0|dffs[20] ; 8       ;
; lpm_counter:count_rtl_0|dffs[21] ; 7       ;
; lpm_counter:count_rtl_0|dffs[22] ; 6       ;