boma.fit.eqn

通过VERILOG HDL语言使用CPLD连接PS2键盘

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--A1L51 is bb[0]~37 at LC38
A1L51_p1_out = reset & a[0];
A1L51_or_out = A1L51_p1_out;
A1L51 = A1L51_or_out;


--A1L61 is bb[1]~39 at LC37
A1L61_p1_out = reset & a[1];
A1L61_or_out = A1L61_p1_out;
A1L61 = A1L61_or_out;


--A1L71 is bb[2]~41 at LC35
A1L71_p1_out = reset & a[2];
A1L71_or_out = A1L71_p1_out;
A1L71 = A1L71_or_out;


--A1L81 is bb[3]~43 at LC33
A1L81_p1_out = reset & a[3];
A1L81_or_out = A1L81_p1_out;
A1L81 = A1L81_or_out;


--a[0] is a[0] at PIN_31
--operation mode is input

a[0] = INPUT();


--a[1] is a[1] at PIN_32
--operation mode is input

a[1] = INPUT();


--a[2] is a[2] at PIN_35
--operation mode is input

a[2] = INPUT();


--a[3] is a[3] at PIN_36
--operation mode is input

a[3] = INPUT();


--reset is reset at PIN_37
--operation mode is input

reset = INPUT();


--b[0] is b[0] at PIN_22
--operation mode is output

b[0] = OUTPUT(A1L51);


--b[1] is b[1] at PIN_23
--operation mode is output

b[1] = OUTPUT(A1L61);


--b[2] is b[2] at PIN_24
--operation mode is output

b[2] = OUTPUT(A1L71);


--b[3] is b[3] at PIN_25
--operation mode is output

b[3] = OUTPUT(A1L81);