generalboardub2.fit.rpt
来自「飞机电气检测的界面程序设计」· RPT 代码 · 共 424 行 · 第 1/3 页
RPT
424 行
; kle~3751 ; 1 ;
; kle~3749 ; 1 ;
; kle~3748 ; 1 ;
; kle~3741 ; 1 ;
; kle~3738 ; 1 ;
; kle~3736 ; 1 ;
; kle~3729 ; 1 ;
; kle~3723 ; 1 ;
; kle~3721 ; 1 ;
; kle~3720 ; 1 ;
; kle~3713 ; 1 ;
; kle~3712 ; 1 ;
; kle~3706 ; 1 ;
; kle~3704 ; 1 ;
; kle~3702 ; 1 ;
; kle~3697 ; 1 ;
; kle~3693 ; 1 ;
; kle~3685 ; 1 ;
; kle~3679 ; 1 ;
+------------------+--------------+
+-----------------------------------------------+
; Interconnect Usage Summary ;
+----------------------------+------------------+
; Interconnect Resource Type ; Usage ;
+----------------------------+------------------+
; Output enables ; 0 / 6 ( 0 % ) ;
; PIA buffers ; 42 / 72 ( 58 % ) ;
+----------------------------+------------------+
+----------------------------------------------------------------------+
; LAB Macrocells ;
+----------------------------------------+-----------------------------+
; Number of Macrocells (Average = 9.00) ; Number of LABs (Total = 2) ;
+----------------------------------------+-----------------------------+
; 0 ; 0 ;
; 1 ; 0 ;
; 2 ; 0 ;
; 3 ; 0 ;
; 4 ; 0 ;
; 5 ; 0 ;
; 6 ; 1 ;
; 7 ; 0 ;
; 8 ; 0 ;
; 9 ; 0 ;
; 10 ; 0 ;
; 11 ; 0 ;
; 12 ; 1 ;
+----------------------------------------+-----------------------------+
+---------------------------------------------------------+
; Parallel Expander ;
+--------------------------+------------------------------+
; Parallel Expander Length ; Number of Parallel Expanders ;
+--------------------------+------------------------------+
; 0 ; 0 ;
; 1 ; 1 ;
+--------------------------+------------------------------+
+-------------------------------------------------------------------------------+
; Shareable Expander ;
+-------------------------------------------------+-----------------------------+
; Number of shareable expanders (Average = 5.00) ; Number of LABs (Total = 1) ;
+-------------------------------------------------+-----------------------------+
; 0 ; 1 ;
; 1 ; 0 ;
; 2 ; 0 ;
; 3 ; 0 ;
; 4 ; 0 ;
; 5 ; 0 ;
; 6 ; 0 ;
; 7 ; 0 ;
; 8 ; 0 ;
; 9 ; 0 ;
; 10 ; 1 ;
+-------------------------------------------------+-----------------------------+
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Logic Cell Interconnection ;
+-----+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------+
; LAB ; Logic Cell ; Input ; Output ;
+-----+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------+
; A ; LC15 ; addressC[5], addressC[6], bte[1], addressB[2], addressB[5], bte[2], addressB[3], addressB[4], addressB[6], bte[3] ; kle~3738 ;
; A ; LC14 ; bte[2], addressB[6] ; kle~3679, kle~3729, kle~3748 ;
; A ; LC4 ; addressC[6], bte[1] ; kle~3679, kle~3712, kle~3720 ;
; A ; LC9 ; addressA[2], addressA[4], addressA[3], bse, addressA[6], addressA[5] ; kle~3693 ;
; A ; LC2 ; addressA[4], bse, addressA[6], addressA[5], addressA[2], addressA[3] ; kle~3702 ;
; A ; LC13 ; addressB[2], addressB[3] ; kle~3702 ;
; B ; LC22 ; addressA[2], addressA[4], addressA[3], bse, addressA[6], addressA[5], kle~3674bal, bte[3], addressC[3], addressC[2], addressC[4], addressC[5], kle~3675bal ; kle[6] ;
; B ; LC21 ; kle~3758, addressC[6], addressB[6], bte[3], addressB[2], addressB[3], addressB[5], addressB[4], bte[2], bte[1] ; kle[7] ;
; B ; LC27 ; kle~3686bal, addressC[6], bte[1], addressC[5], addressB[5], bte[2], addressB[4], addressB[6], bte[3], kle~3687bal, addressC[4] ; kle[2] ;
; B ; LC26 ; kle~3695bal, bte[2], addressB[6], bte[3], kle~3696bal, addressB[5], addressB[4], kle~3697, addressC[6], bte[1] ; kle[3] ;
; B ; LC24 ; addressA[2], addressA[3], addressA[4], bse, addressA[6], addressA[5], kle~3675bal, bte[2], bte[3], kle~3706, addressC[4], addressC[5], kle~3704, addressB[6] ; kle[4] ;
; B ; LC23 ; addressA[2], addressA[4], addressA[3], bse, addressA[6], addressA[5], bte[2], bte[3], addressC[3], addressC[4], addressC[5], kle~3713, addressB[6], kle~3675bal ; kle[5] ;
; B ; LC18 ; addressA[2], addressA[3], addressA[4], bse, addressA[6], addressA[5], kle~3674bal, bte[1], bte[3], kle~3723, addressB[5], addressB[4], kle~3721, addressC[6] ; kle[9] ;
; B ; LC28 ; kle~3736, kle~3731sexpand0, addressC[4], addressC[3], addressC[6], bte[1] ; kle[1] ;
; B ; LC19 ; addressA[3], addressA[2], addressA[4], bse, addressA[6], addressA[5], bte[1], bte[3], addressB[3], addressB[5], addressB[4], kle~3741, addressC[6], kle~3674bal ; kle[8] ;
; B ; LC17 ; kle~3749, bte[1], addressC[6], bte[3], kle~3687bal, addressC[5], addressC[4], kle~3751, bte[2], addressB[6] ; kle[10] ;
; B ; LC20 ; addressA[2], addressA[3], addressA[4], bse, addressA[6], addressA[5], addressC[6], bte[2], bte[3] ; kle~3685 ;
; B ; LC25 ; addressC[3], addressC[2] ; kle~3693, kle~3756 ;
+-----+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------+
+----------------------------------------------------------------------------------------+
; Fitter Device Options ;
+----------------------------------------------+-----------------------------------------+
; Option ; Setting ;
+----------------------------------------------+-----------------------------------------+
; Enable user-supplied start-up clock (CLKUSR) ; Off ;
; Enable device-wide reset (DEV_CLRn) ; Off ;
; Enable device-wide output enable (DEV_OE) ; Off ;
; Enable INIT_DONE output ; Off ;
; Configuration scheme ; Passive Serial ;
; Reserve all unused pins ; As output driving an unspecified signal ;
; Security bit ; Off ;
; Base pin-out file on sameframe device ; Off ;
+----------------------------------------------+-----------------------------------------+
+-----------------+
; Fitter Messages ;
+-----------------+
Info: *******************************************************************
Info: Running Quartus II Fitter
Info: Version 7.1 Build 156 04/30/2007 SJ Full Version
Info: Processing started: Thu Dec 27 20:32:34 2007
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off generalBoardUb2 -c generalBoardUb2
Info: Selected device EPM7032SLC44-10 for design "generalBoardUb2"
Info: Quartus II Fitter was successful. 0 errors, 0 warnings
Info: Allocated 137 megabytes of memory during processing
Info: Processing ended: Thu Dec 27 20:32:35 2007
Info: Elapsed time: 00:00:01
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