📄 prev_cmp_generalboardub3.map.qmsg
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.1 Build 156 04/30/2007 SJ Full Version " "Info: Version 7.1 Build 156 04/30/2007 SJ Full Version" { } { } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Dec 27 20:14:21 2007 " "Info: Processing started: Thu Dec 27 20:14:21 2007" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off generalBoardUb3 -c generalBoardUb3 " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off generalBoardUb3 -c generalBoardUb3" { } { } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "generalBoardUb3.v 1 1 " "Warning: Using design file generalBoardUb3.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 generalBoardUb3 " "Info: Found entity 1: generalBoardUb3" { } { { "generalBoardUb3.v" "" { Text "D:/CPLD GENERALBOARD/Ub3/generalBoardUb3.v" 1 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} } { } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "generalBoardUb3 " "Info: Elaborating entity \"generalBoardUb3\" for the top level hierarchy" { } { } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 6 generalBoardUb3.v(28) " "Warning (10230): Verilog HDL assignment warning at generalBoardUb3.v(28): truncated value with size 32 to match size of target (6)" { } { { "generalBoardUb3.v" "" { Text "D:/CPLD GENERALBOARD/Ub3/generalBoardUb3.v" 28 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 6 generalBoardUb3.v(29) " "Warning (10230): Verilog HDL assignment warning at generalBoardUb3.v(29): truncated value with size 32 to match size of target (6)" { } { { "generalBoardUb3.v" "" { Text "D:/CPLD GENERALBOARD/Ub3/generalBoardUb3.v" 29 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 6 generalBoardUb3.v(30) " "Warning (10230): Verilog HDL assignment warning at generalBoardUb3.v(30): truncated value with size 32 to match size of target (6)" { } { { "generalBoardUb3.v" "" { Text "D:/CPLD GENERALBOARD/Ub3/generalBoardUb3.v" 30 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "10 2 generalBoardUb3.v(45) " "Warning (10230): Verilog HDL assignment warning at generalBoardUb3.v(45): truncated value with size 10 to match size of target (2)" { } { { "generalBoardUb3.v" "" { Text "D:/CPLD GENERALBOARD/Ub3/generalBoardUb3.v" 45 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../../altera/71/quartus/libraries/megafunctions/lpm_add_sub.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../../altera/71/quartus/libraries/megafunctions/lpm_add_sub.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_add_sub " "Info: Found entity 1: lpm_add_sub" { } { { "lpm_add_sub.tdf" "" { Text "d:/altera/71/quartus/libraries/megafunctions/lpm_add_sub.tdf" 102 1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} } { } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_add_sub:Add2 " "Info: Elaborated megafunction instantiation \"lpm_add_sub:Add2\"" { } { { "generalBoardUb3.v" "" { Text "D:/CPLD GENERALBOARD/Ub3/generalBoardUb3.v" 30 -1 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../../altera/71/quartus/libraries/megafunctions/addcore.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../../altera/71/quartus/libraries/megafunctions/addcore.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 addcore " "Info: Found entity 1: addcore" { } { { "addcore.tdf" "" { Text "d:/altera/71/quartus/libraries/megafunctions/addcore.tdf" 73 1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} } { } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "lpm_add_sub:Add2\|addcore:adder lpm_add_sub:Add2 " "Info: Elaborated megafunction instantiation \"lpm_add_sub:Add2\|addcore:adder\", which is child of megafunction instantiation \"lpm_add_sub:Add2\"" { } { { "lpm_add_sub.tdf" "" { Text "d:/altera/71/quartus/libraries/megafunctions/lpm_add_sub.tdf" 268 4 0 } } { "generalBoardUb3.v" "" { Text "D:/CPLD GENERALBOARD/Ub3/generalBoardUb3.v" 30 -1 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "lpm_add_sub:Add2 " "Info: Instantiated megafunction \"lpm_add_sub:Add2\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 6 " "Info: Parameter \"LPM_WIDTH\" = \"6\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} } { { "generalBoardUb3.v" "" { Text "D:/CPLD GENERALBOARD/Ub3/generalBoardUb3.v" 30 -1 0 } } } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../../altera/71/quartus/libraries/megafunctions/a_csnbuffer.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../../altera/71/quartus/libraries/megafunctions/a_csnbuffer.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 a_csnbuffer " "Info: Found entity 1: a_csnbuffer" { } { { "a_csnbuffer.tdf" "" { Text "d:/altera/71/quartus/libraries/megafunctions/a_csnbuffer.tdf" 10 1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} } { } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "lpm_add_sub:Add2\|addcore:adder\|a_csnbuffer:oflow_node lpm_add_sub:Add2 " "Info: Elaborated megafunction instantiation \"lpm_add_sub:Add2\|addcore:adder\|a_csnbuffer:oflow_node\", which is child of megafunction instantiation \"lpm_add_sub:Add2\"" { } { { "addcore.tdf" "" { Text "d:/altera/71/quartus/libraries/megafunctions/addcore.tdf" 94 2 0 } } { "generalBoardUb3.v" "" { Text "D:/CPLD GENERALBOARD/Ub3/generalBoardUb3.v" 30 -1 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "lpm_add_sub:Add2 " "Info: Instantiated megafunction \"lpm_add_sub:Add2\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 6 " "Info: Parameter \"LPM_WIDTH\" = \"6\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} } { { "generalBoardUb3.v" "" { Text "D:/CPLD GENERALBOARD/Ub3/generalBoardUb3.v" 30 -1 0 } } } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "lpm_add_sub:Add2\|addcore:adder\|a_csnbuffer:result_node lpm_add_sub:Add2 " "Info: Elaborated megafunction instantiation \"lpm_add_sub:Add2\|addcore:adder\|a_csnbuffer:result_node\", which is child of megafunction instantiation \"lpm_add_sub:Add2\"" { } { { "addcore.tdf" "" { Text "d:/altera/71/quartus/libraries/megafunctions/addcore.tdf" 199 5 0 } } { "generalBoardUb3.v" "" { Text "D:/CPLD GENERALBOARD/Ub3/generalBoardUb3.v" 30 -1 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "lpm_add_sub:Add2 " "Info: Instantiated megafunction \"lpm_add_sub:Add2\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 6 " "Info: Parameter \"LPM_WIDTH\" = \"6\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} } { { "generalBoardUb3.v" "" { Text "D:/CPLD GENERALBOARD/Ub3/generalBoardUb3.v" 30 -1 0 } } } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "lpm_add_sub:Add2\|addcore:adder\|addcore:adder\[0\] lpm_add_sub:Add2 " "Info: Elaborated megafunction instantiation \"lpm_add_sub:Add2\|addcore:adder\|addcore:adder\[0\]\", which is child of megafunction instantiation \"lpm_add_sub:Add2\"" { } { { "addcore.tdf" "" { Text "d:/altera/71/quartus/libraries/megafunctions/addcore.tdf" 200 10 0 } } { "generalBoardUb3.v" "" { Text "D:/CPLD GENERALBOARD/Ub3/generalBoardUb3.v" 30 -1 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "lpm_add_sub:Add2 " "Info: Instantiated megafunction \"lpm_add_sub:Add2\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 6 " "Info: Parameter \"LPM_WIDTH\" = \"6\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} } { { "generalBoardUb3.v" "" { Text "D:/CPLD GENERALBOARD/Ub3/generalBoardUb3.v" 30 -1 0 } } } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "lpm_add_sub:Add2\|addcore:adder\|addcore:adder\[0\]\|a_csnbuffer:oflow_node lpm_add_sub:Add2 " "Info: Elaborated megafunction instantiation \"lpm_add_sub:Add2\|addcore:adder\|addcore:adder\[0\]\|a_csnbuffer:oflow_node\", which is child of megafunction instantiation \"lpm_add_sub:Add2\"" { } { { "addcore.tdf" "" { Text "d:/altera/71/quartus/libraries/megafunctions/addcore.tdf" 94 2 0 } } { "generalBoardUb3.v" "" { Text "D:/CPLD GENERALBOARD/Ub3/generalBoardUb3.v" 30 -1 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "lpm_add_sub:Add2 " "Info: Instantiated megafunction \"lpm_add_sub:Add2\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 6 " "Info: Parameter \"LPM_WIDTH\" = \"6\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} } { { "generalBoardUb3.v" "" { Text "D:/CPLD GENERALBOARD/Ub3/generalBoardUb3.v" 30 -1 0 } } } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "lpm_add_sub:Add2\|addcore:adder\|addcore:adder\[0\]\|a_csnbuffer:result_node lpm_add_sub:Add2 " "Info: Elaborated megafunction instantiation \"lpm_add_sub:Add2\|addcore:adder\|addcore:adder\[0\]\|a_csnbuffer:result_node\", which is child of megafunction instantiation \"lpm_add_sub:Add2\"" { } { { "addcore.tdf" "" { Text "d:/altera/71/quartus/libraries/megafunctions/addcore.tdf" 186 5 0 } } { "generalBoardUb3.v" "" { Text "D:/CPLD GENERALBOARD/Ub3/generalBoardUb3.v" 30 -1 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0}
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