genralua.vo

飞机电气检测的界面程序设计

// Copyright (C) 1991-2007 Altera Corporation
// Your use of Altera Corporation's design tools, logic functions 
// and other software and tools, and its AMPP partner logic 
// functions, and any output files from any of the foregoing 
// (including device programming or simulation files), and any 
// associated documentation or information are expressly subject 
// to the terms and conditions of the Altera Program License 
// Subscription Agreement, Altera MegaCore Function License 
// Agreement, or other applicable license agreement, including, 
// without limitation, that your use is for the sole purpose of 
// programming logic devices manufactured by Altera and sold by 
// Altera or its authorized distributors.  Please refer to the 
// applicable agreement for further details.

// VENDOR "Altera"
// PROGRAM "Quartus II"
// VERSION "Version 7.1 Build 156 04/30/2007 SJ Full Version"

// DATE "12/27/2007 21:00:08"

// 
// Device: Altera EPM7032SLC44-10 Package PLCC44
// 

// 
// This Verilog file should be used for PrimeTime (Verilog) only
// 

`timescale 1 ps/ 1 ps

module genralUa (
	bse,
	address,
	ke);
input 	bse;
input 	[6:1] address;
output 	[25:1] ke;

wire gnd = 1'b0;
wire vcc = 1'b1;

// synopsys translate_off
initial $sdf_annotate("genralUa_v.sdo");
// synopsys translate_on

wire \address[3]~dataout ;
wire \address[2]~dataout ;
wire \address[4]~dataout ;
wire \address[5]~dataout ;
wire \address[6]~dataout ;
wire \bse~dataout ;
wire \Decoder0~375_dataout ;
wire \Decoder0~377_dataout ;
wire \Decoder0~379_dataout ;
wire \Decoder0~381_dataout ;
wire \Decoder0~383_dataout ;
wire \Decoder0~385_dataout ;
wire \Decoder0~387_dataout ;
wire \Decoder0~389_dataout ;
wire \Decoder0~391_dataout ;
wire \Decoder0~393_dataout ;
wire \Decoder0~395_dataout ;
wire \Decoder0~397_dataout ;
wire \Decoder0~399_dataout ;
wire \Decoder0~401_dataout ;
wire \Decoder0~403_dataout ;
wire \Decoder0~405_dataout ;
wire \Decoder0~407_dataout ;
wire \Decoder0~409_dataout ;
wire \Decoder0~411_dataout ;
wire \Decoder0~413_dataout ;
wire \Decoder0~415_dataout ;
wire \Decoder0~417_dataout ;
wire \Decoder0~419_dataout ;
wire \Decoder0~421_dataout ;
wire \Decoder0~423_dataout ;

wire \ALT_INV_address[3]~dataout ;
wire \ALT_INV_address[2]~dataout ;
wire \ALT_INV_address[4]~dataout ;
wire \ALT_INV_address[5]~dataout ;
wire \ALT_INV_address[6]~dataout ;

INV \INV_INST_address[3]~dataout  (
	.IN1(\address[3]~dataout ),
	.Y(\ALT_INV_address[3]~dataout ));

INV \INV_INST_address[2]~dataout  (
	.IN1(\address[2]~dataout ),
	.Y(\ALT_INV_address[2]~dataout ));

INV \INV_INST_address[4]~dataout  (
	.IN1(\address[4]~dataout ),
	.Y(\ALT_INV_address[4]~dataout ));

INV \INV_INST_address[5]~dataout  (
	.IN1(\address[5]~dataout ),
	.Y(\ALT_INV_address[5]~dataout ));

INV \INV_INST_address[6]~dataout  (
	.IN1(\address[6]~dataout ),
	.Y(\ALT_INV_address[6]~dataout ));

// atom is at PIN_44
max_io \address[3]~I (
	.datain(gnd),
	.oe(gnd),
	.modesel(9'b101010001),
	.dataout(\address[3]~dataout ),
	.padio(address[3]));
// synopsys translate_off
// defparam \address[3]~I .bus_hold = "false";
// defparam \address[3]~I .open_drain_output = "false";
// defparam \address[3]~I .operation_mode = "input";
// defparam \address[3]~I .weak_pull_up = "false";
// synopsys translate_on

// atom is at PIN_1
max_io \address[2]~I (
	.datain(gnd),
	.oe(gnd),
	.modesel(9'b101010001),
	.dataout(\address[2]~dataout ),
	.padio(address[2]));
// synopsys translate_off
// defparam \address[2]~I .bus_hold = "false";
// defparam \address[2]~I .open_drain_output = "false";
// defparam \address[2]~I .operation_mode = "input";
// defparam \address[2]~I .weak_pull_up = "false";
// synopsys translate_on

// atom is at PIN_43
max_io \address[4]~I (
	.datain(gnd),
	.oe(gnd),
	.modesel(9'b101010001),
	.dataout(\address[4]~dataout ),
	.padio(address[4]));
// synopsys translate_off
// defparam \address[4]~I .bus_hold = "false";
// defparam \address[4]~I .open_drain_output = "false";
// defparam \address[4]~I .operation_mode = "input";
// defparam \address[4]~I .weak_pull_up = "false";
// synopsys translate_on

// atom is at PIN_4
max_io \address[5]~I (
	.datain(gnd),