📄 fpga_core.edn

📁 可以在里面修改协议.主要是cmos---fpga--usb(68013a)中除68013a部分的程序
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(edif fpga_core
  (edifVersion 2 0 0)
  (edifLevel 0)
  (keywordMap (keywordLevel 0))
  (status
    (written
      (timeStamp 2008 5 7 16 22 48)
      (author "Synplicity, Inc.")
      (program "Synplify" (version "8.8.0, Build 015R"))
     )
   )
  (library PA3
    (edifLevel 0)
    (technology (numberDefinition ))
    (cell RAM512X18 (cellType GENERIC)
      (property dont_use (integer 1))
      (property dont_touch (string "true"))
      (property interface_timing (string "true"))
      (property area (integer 0))
       (view prim (viewType NETLIST)
         (interface
           (port RD0 (direction OUTPUT)
 )
           (port RD1 (direction OUTPUT)
 )
           (port RD2 (direction OUTPUT)
 )
           (port RD3 (direction OUTPUT)
 )
           (port RD4 (direction OUTPUT)
 )
           (port RD5 (direction OUTPUT)
 )
           (port RD6 (direction OUTPUT)
 )
           (port RD7 (direction OUTPUT)
 )
           (port RD8 (direction OUTPUT)
 )
           (port RD9 (direction OUTPUT)
 )
           (port RD10 (direction OUTPUT)
 )
           (port RD11 (direction OUTPUT)
 )
           (port RD12 (direction OUTPUT)
 )
           (port RD13 (direction OUTPUT)
 )
           (port RD14 (direction OUTPUT)
 )
           (port RD15 (direction OUTPUT)
 )
           (port RD16 (direction OUTPUT)
 )
           (port RD17 (direction OUTPUT)
 )
           (port PIPE (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port RADDR0 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port RADDR1 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port RADDR2 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port RADDR3 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port RADDR4 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port RADDR5 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port RADDR6 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port RADDR7 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port RADDR8 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port RCLK (direction INPUT)
           (property min_pulse_width_low (integer 3))
           (property min_pulse_width_high (integer 3))
           (property clock (string "true"))
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port REN (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port RESET (direction INPUT)
           (property capacitance (integer 1))
 )
           (port RW1 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port RW0 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WADDR0 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WADDR1 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WADDR2 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WADDR3 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WADDR4 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WADDR5 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WADDR6 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WADDR7 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WADDR8 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WCLK (direction INPUT)
           (property min_pulse_width_low (integer 3))
           (property min_pulse_width_high (integer 3))
           (property clock (string "true"))
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WD0 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WD1 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WD2 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WD3 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WD4 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WD5 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WD6 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WD7 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WD8 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WD9 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WD10 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WD11 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WD12 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WD13 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WD14 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WD15 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WD16 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WD17 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WEN (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WW1 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
           (port WW0 (direction INPUT)
           (property fanout_load (integer 1))
           (property capacitance (integer 1))
 )
         )
        (property area (integer 0))
       )
    )
    (cell XOR3 (cellType GENERIC)
      (property dont_touch (string "false"))
      (property area (integer 1))
       (view prim (viewType NETLIST)
         (interface
           (port Y (direction OUTPUT)
           (property max_fanout (integer 2000))
           (property function (string "A ^ B ^ C"))
 )
           (port A (direction INPUT)
           (property capacitance (integer 1))
 )
           (port B (direction INPUT)
           (property capacitance (integer 1))
 )
           (port C (direction INPUT)
           (property capacitance (integer 1))
 )
         )
        (property is_combinational (integer 1))
        (property area (integer 1))
       )
    )
    (cell XOR2 (cellType GENERIC)
      (property dont_touch (string "false"))
      (property area (integer 1))
       (view prim (viewType NETLIST)
         (interface
           (port Y (direction OUTPUT)
           (property max_fanout (integer 2000))
           (property function (string "A ^ B"))
 )
           (port A (direction INPUT)
           (property capacitance (integer 1))
 )
           (port B (direction INPUT)
           (property capacitance (integer 1))
 )
         )
        (property is_combinational (integer 1))
        (property area (integer 1))
       )
    )
    (cell XNOR3 (cellType GENERIC)
      (property dont_touch (string "false"))
      (property area (integer 1))
       (view prim (viewType NETLIST)
         (interface
           (port Y (direction OUTPUT)
           (property max_fanout (integer 2000))
           (property function (string "!(A ^ B ^ C)"))
 )
           (port A (direction INPUT)
           (property capacitance (integer 1))
 )
           (port B (direction INPUT)
           (property capacitance (integer 1))
 )
           (port C (direction INPUT)
           (property capacitance (integer 1))
 )
         )
        (property is_combinational (integer 1))
        (property area (integer 1))
       )
    )
    (cell XNOR2 (cellType GENERIC)
      (property dont_touch (string "false"))
      (property area (integer 1))
       (view prim (viewType NETLIST)
         (interface
           (port Y (direction OUTPUT)
           (property max_fanout (integer 2000))
           (property function (string "!(A ^ B)"))
 )
           (port A (direction INPUT)
           (property capacitance (integer 1))
 )
           (port B (direction INPUT)
           (property capacitance (integer 1))
 )
         )
        (property is_combinational (integer 1))
        (property area (integer 1))
       )
    )
    (cell XAI1 (cellType GENERIC)
      (property dont_touch (string "false"))
      (property area (integer 1))
       (view prim (viewType NETLIST)
         (interface
           (port Y (direction OUTPUT)
           (property max_fanout (integer 2000))
           (property function (string "!((A ^ B) & C)"))
 )
           (port A (direction INPUT)
           (property capacitance (integer 1))
 )
           (port B (direction INPUT)
           (property capacitance (integer 1))
 )
           (port C (direction INPUT)
           (property capacitance (integer 1))
 )
         )
        (property is_combinational (integer 1))
        (property area (integer 1))
       )
    )
    (cell XA1A (cellType GENERIC)
      (property dont_touch (string "false"))
      (property area (integer 1))
       (view prim (viewType NETLIST)
         (interface
           (port Y (direction OUTPUT)
           (property max_fanout (integer 2000))
           (property function (string "!(A ^ B) & C"))
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