run.do

来自「可以在里面修改协议.主要是cmos---fpga--usb(68013a)中除6」· DO 代码 · 共 12 行

quietly set ACTELLIBNAME proasic3
quietly set PROJECT_DIR "H:/fpga_test/fpga_fifo_0122_02"
vlib presynth
vmap proasic3 "$env(MODEL_TECH)/../actel/vlog/proasic3"
vmap presynth presynth
vlog "+incdir+${PROJECT_DIR}/smartgen/fifo_fpga1280x8" "+incdir+${PROJECT_DIR}/hdl" -work presynth "${PROJECT_DIR}/smartgen/fifo_fpga1280x8/fifo_fpga1280x8.v"
vlog "+incdir+${PROJECT_DIR}/hdl" "+incdir+${PROJECT_DIR}/hdl" -work presynth "${PROJECT_DIR}/hdl/fifo_fpga_1280x8.v"
vlog "+incdir+${PROJECT_DIR}/stimulus" "+incdir+${PROJECT_DIR}/hdl" -work presynth "${PROJECT_DIR}/stimulus/ctr_data_tb.v"
vsim -L proasic3 -L presynth  -t 1ps presynth.fpga_fpga_1280x8_tb
add wave /fpga_fpga_1280x8_tb/*
run 1000ns