test.hif

基于QUARTUSII软件 实现FPGA（ATERA CYCLONE II系列）与SD卡SD模式通信源码

# source_file
..|libraries|megafunctions|sld_rom_sr.vhd
1114012236
4
# storage
db|test.(66).cnf
db|test.(66).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
common_ip_version
0
PARAMETER_DEC
USR
n_bits
32
PARAMETER_DEC
USR
word_size
4
PARAMETER_DEC
USR
}
# end
# entity
sld_hub
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|libraries|megafunctions|sld_hub.vhd
1114012238
4
# storage
db|test.(67).cnf
db|test.(67).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
sld_hub_ip_version
1
PARAMETER_UNKNOWN
USR
sld_hub_ip_minor_version
2
PARAMETER_UNKNOWN
USR
sld_common_ip_version
0
PARAMETER_UNKNOWN
USR
device_family
Cyclone II
PARAMETER_UNKNOWN
USR
n_nodes
1
PARAMETER_UNKNOWN
USR
n_sel_bits
1
PARAMETER_UNKNOWN
USR
n_node_ir_bits
7
PARAMETER_UNKNOWN
USR
node_info
00011000000000000110111000000000
PARAMETER_BIN
USR
}
# include_file {
..|libraries|megafunctions|sld_hub.vhd
1114012238
}
# end
# entity
sld_jtag_state_machine
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|libraries|megafunctions|sld_hub.vhd
1114012238
4
# storage
db|test.(68).cnf
db|test.(68).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ip_major_version
1
PARAMETER_DEC
USR
ip_minor_version
2
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
}
# include_file {
..|libraries|megafunctions|sld_hub.vhd
1114012238
}
# end
# entity
lpm_shiftreg
# case_insensitive
# source_file
..|libraries|megafunctions|lpm_shiftreg.tdf
1114012454
6
# storage
db|test.(69).cnf
db|test.(69).cnf
# user_parameter {
LPM_WIDTH
10
PARAMETER_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
aclr
clock
enable
q0
q1
q2
q3
q4
q5
q6
q7
q8
q9
shiftin
}
# include_file {
..|libraries|megafunctions|aglobal50.inc
1114012420
..|libraries|megafunctions|dffeea.inc
1107574164
..|libraries|megafunctions|lpm_constant.inc
1107574524
}
# end
# entity
lpm_decode
# case_insensitive
# source_file
..|libraries|megafunctions|lpm_decode.tdf
1114012450
6
# storage
db|test.(70).cnf
db|test.(70).cnf
# user_parameter {
LPM_WIDTH
3
PARAMETER_DEC
USR
LPM_DECODES
8
PARAMETER_DEC
USR
LPM_PIPELINE
1
PARAMETER_DEC
USR
CASCADE_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
decode_rpe
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
aclr
clken
clock
data0
data1
data2
enable
eq0
eq1
eq2
eq3
eq7
}
# include_file {
..|libraries|megafunctions|aglobal50.inc
1114012420
..|libraries|megafunctions|altshift.inc
1107573438
..|libraries|megafunctions|lpm_constant.inc
1107574524
..|libraries|megafunctions|lpm_compare.inc
1107574500
..|libraries|megafunctions|declut.inc
1107574136
}
# end
# entity
decode_rpe
# case_insensitive
# source_file
db|decode_rpe.tdf
1191214394
6
# storage
db|test.(71).cnf
db|test.(71).cnf
# used_port {
aclr
clken
clock
data0
data1
data2
enable
eq0
eq1
eq2
eq3
eq4
eq5
eq6
eq7
}
# end
# entity
sld_dffex
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|libraries|megafunctions|sld_dffex.vhd
1114012236
4
# storage
db|test.(72).cnf
db|test.(72).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
size
1
PARAMETER_DEC
USR
}
# end
# entity
sld_dffex
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|libraries|megafunctions|sld_dffex.vhd
1114012236
4
# storage
db|test.(73).cnf
db|test.(73).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
size
8
PARAMETER_DEC
USR
}
# end
# entity
sld_dffex
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|libraries|megafunctions|sld_dffex.vhd
1114012236
4
# storage
db|test.(74).cnf
db|test.(74).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
size
7
PARAMETER_DEC
USR
}
# end
# entity
sld_rom_sr
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|libraries|megafunctions|sld_rom_sr.vhd
1114012236
4
# storage
db|test.(75).cnf
db|test.(75).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
common_ip_version
0
PARAMETER_DEC
USR
n_bits
64
PARAMETER_DEC
USR
word_size
4
PARAMETER_DEC
USR
}
# end
# entity
test
# case_insensitive
# source_file
test.bdf
1194341428
23
# storage
db|test.(0).cnf
db|test.(0).cnf
# hierarchies {
|
}
# end
# entity
sld_signaltap
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|libraries|megafunctions|sld_signaltap.vhd
1114012240
4
# storage
db|test.(56).cnf
db|test.(56).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
lpm_type
sld_signaltap
PARAMETER_STRING
DEF
sld_node_info
402681344
PARAMETER_UNKNOWN
USR
sld_ip_version
3
PARAMETER_DEC
DEF
sld_ip_minor_version
2
PARAMETER_DEC
DEF
sld_common_ip_version
0
PARAMETER_DEC
DEF
sld_data_bits
9
PARAMETER_UNKNOWN
USR
sld_trigger_bits
9
PARAMETER_UNKNOWN
USR
sld_data_bit_cntr_bits
4
PARAMETER_UNKNOWN
USR
sld_node_crc_bits
32
PARAMETER_DEC
DEF
sld_node_crc_hiword
59449
PARAMETER_UNKNOWN
USR
sld_node_crc_loword
17607
PARAMETER_UNKNOWN
USR
sld_incremental_routing
0
PARAMETER_DEC
DEF
sld_sample_depth
16384
PARAMETER_UNKNOWN
USR
sld_mem_address_bits
14
PARAMETER_UNKNOWN
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
DEF
sld_trigger_level
1
PARAMETER_UNKNOWN
USR
sld_trigger_in_enabled
1
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_UNKNOWN
USR
sld_trigger_level_pipeline
1
PARAMETER_UNKNOWN
USR
sld_enable_advanced_trigger
0
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_2
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_3
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_4
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_5
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_6
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_7
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_8
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_9
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_10
NONE
PARAMETER_STRING
DEF
}
# include_file {
..|libraries|megafunctions|sld_signaltap.vhd
1114012240
}
# end
# entity
sld_ela_control
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|libraries|megafunctions|sld_ela_control.vhd
1114012238
4
# storage
db|test.(76).cnf
db|test.(76).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ip_major_version
3
PARAMETER_DEC
USR
ip_minor_version
2
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
trigger_input_width
9
PARAMETER_DEC
USR
trigger_level
1
PARAMETER_DEC
USR
trigger_in_enabled
1
PARAMETER_DEC
USR
enable_clk_edge_def
0
PARAMETER_DEC
USR
enable_async_glitch
0
PARAMETER_DEC
USR
enable_sync_normal
1
PARAMETER_DEC
USR
advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
enable_advanced_trigger
0
PARAMETER_DEC
USR
trigger_level_pipeline
1
PARAMETER_DEC
USR
ela_status_bits
3
PARAMETER_DEC
USR
mem_address_bits
14
PARAMETER_DEC
USR
sample_depth
16384
PARAMETER_DEC
USR
}
# end
# entity
lpm_shiftreg
# case_insensitive
# source_file
..|libraries|megafunctions|lpm_shiftreg.tdf
1114012454
6
# storage
db|test.(77).cnf
db|test.(77).cnf
# user_parameter {
LPM_WIDTH
23
PARAMETER_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
aclr
clock
data0
data10
data11
data12
data13
data14
data15
data16
data17
data18
data19
data1
data20
data21
data22
data2
data3
data4
data5
data6
data7
data8
data9
enable
load
q0
q10
q11
q12
q13
q14
q15
q16
q17
q18
q19
q1
q20
q21
q22
q2
q3
q4
q5
q6
q7
q8
q9
shiftin
shiftout
}
# include_file {
..|libraries|megafunctions|aglobal50.inc
1114012420
..|libraries|megafunctions|dffeea.inc
1107574164
..|libraries|megafunctions|lpm_constant.inc
1107574524
}
# end
# entity
sld_ela_basic_multi_level_trigger
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|libraries|megafunctions|sld_ela_control.vhd
1114012238
4
# storage
db|test.(78).cnf
db|test.(78).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ip_major_version
3
PARAMETER_DEC
USR
ip_minor_version
2
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
trigger_level
1
PARAMETER_DEC
USR
data_bits
9
PARAMETER_DEC
USR
async_enabled
0
PARAMETER_DEC
USR
sync_enabled
1
PARAMETER_DEC
USR
pipeline
1
PARAMETER_DEC
USR
}
# end
# entity
lpm_shiftreg
# case_insensitive
# source_file
..|libraries|megafunctions|lpm_shiftreg.tdf
1114012454
6
# storage
db|test.(79).cnf
db|test.(79).cnf
# user_parameter {
LPM_WIDTH
27
PARAMETER_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
aclr
clock
data0
data10
data11
data12
data13
data14
data15
data16
data17
data18
data19
data1
data20
data21
data22
data23
data24
data25
data26
data2
data3
data4
data5
data6
data7
data8
data9
enable
load
q0
q10
q11
q12
q13
q14
q15
q16
q17
q18
q19
q1
q20
q21
q22
q23
q24
q25
q26
q2
q3
q4
q5
q6
q7
q8
q9
shiftin
shiftout
}
# include_file {
..|libraries|megafunctions|aglobal50.inc
1114012420
..|libraries|megafunctions|dffeea.inc
1107574164
..|libraries|megafunctions|lpm_constant.inc
1107574524
}
# end
# entity
sld_mbpmg
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|libraries|megafunctions|sld_mbpmg.vhd
1114012238
4
# storage
db|test.(80).cnf
db|test.(80).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ip_major_version
3
PARAMETER_DEC
USR
ip_minor_version
2
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
data_bits
9
PARAMETER_DEC
USR
pattern_bits
3
PARAMETER_DEC
USR
async_enabled
0
PARAMETER_DEC
USR
sync_enabled
1
PARAMETER_DEC
USR
pipeline
1
PARAMETER_DEC
USR
}
# end
# entity
sld_ela_level_seq_mgr
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|libraries|megafunctions|sld_ela_control.vhd
1114012238
4
# storage
db|test.(81).cnf
db|test.(81).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ip_major_version
3
PARAMETER_DEC
USR
ip_minor_version
2
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
trigger_level
2
PARAMETER_DEC
USR
ela_status_bits
3
PARAMETER_DEC
USR
mem_address_bits
14
PARAMETER_DEC
USR
trig