xkcon.hier_info

用VHDL语言写的程序实例

|xkcon
reset => pwm~0.IN0
reset => pwm_pinb~reg0.PRESET
reset => pwm_pina~reg0.ACLR
clk8mhz => divider~0.IN0
ale => latch_address~0.IN0
rd => cpu_read~0.IN0
wr => outpa[6]~reg0.CLK
wr => outpa[5]~reg0.CLK
wr => outpa[4]~reg0.CLK
wr => outpa[3]~reg0.CLK
wr => outpa[2]~reg0.CLK
wr => outpa[1]~reg0.CLK
wr => outpa[0]~reg0.CLK
wr => begin_ad.CLK
wr => outpb[7]~reg0.CLK
wr => outpb[6]~reg0.CLK
wr => outpb[5]~reg0.CLK
wr => outpb[4]~reg0.CLK
wr => outpb[3]~reg0.CLK
wr => outpb[2]~reg0.CLK
wr => outpb[1]~reg0.CLK
wr => outpb[0]~reg0.CLK
wr => pwm_count[11].CLK
wr => pwm_count[10].CLK
wr => pwm_count[9].CLK
wr => pwm_count[8].CLK
wr => pwm_count[7].CLK
wr => pwm_count[6].CLK
wr => pwm_count[5].CLK
wr => pwm_count[4].CLK
wr => pwm_count[3].CLK
wr => pwm_count[2].CLK
wr => pwm_count[1].CLK
wr => pwm_count[0].CLK
wr => outpe[5]~reg0.CLK
wr => outpe[4]~reg0.CLK
wr => outpe[3]~reg0.CLK
wr => outpe[2]~reg0.CLK
wr => outpe[1]~reg0.CLK
wr => outpe[0]~reg0.CLK
wr => outpa[7]~reg0.CLK
databus[0] <= cpu_read~25
databus[1] <= cpu_read~22
databus[2] <= cpu_read~19
databus[3] <= cpu_read~16
databus[4] <= cpu_read~13
databus[5] <= cpu_read~10
databus[6] <= cpu_read~8
databus[7] <= cpu_read~6
outpa[0] <= outpa[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outpa[1] <= outpa[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outpa[2] <= outpa[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outpa[3] <= outpa[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outpa[4] <= outpa[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outpa[5] <= outpa[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outpa[6] <= outpa[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outpa[7] <= outpa[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outpb[0] <= outpb[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outpb[1] <= outpb[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outpb[2] <= outpb[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outpb[3] <= outpb[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outpb[4] <= outpb[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outpb[5] <= outpb[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outpb[6] <= outpb[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outpb[7] <= outpb[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outpe[0] <= outpe[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outpe[1] <= outpe[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outpe[2] <= outpe[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outpe[3] <= outpe[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outpe[4] <= outpe[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outpe[5] <= outpe[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
keyin[0] => key_pressed.DATAB
keyin[1] => key_pressed~1.DATAB
keyin[2] => key_pressed~0.DATAB
keyin[3] => key_pressed~0.DATAA
keyout[0] <= keyout~5.DB_MAX_OUTPUT_PORT_TYPE
keyout[1] <= keyout~4.DB_MAX_OUTPUT_PORT_TYPE
keyout[2] <= keyout~3.DB_MAX_OUTPUT_PORT_TYPE
keyout[3] <= keyout~2.DB_MAX_OUTPUT_PORT_TYPE
cs12887 <= cs.DB_MAX_OUTPUT_PORT_TYPE
lcdcs1 => lcdcs2~0.IN0
lcdcs2 <= lcdcs2~0.DB_MAX_OUTPUT_PORT_TYPE
a4052 <= a4052~reg0.DB_MAX_OUTPUT_PORT_TYPE
b4052 <= b4052~reg0.DB_MAX_OUTPUT_PORT_TYPE
adflag => adconvert~0.IN0
pwm_pina <= pwm_pina~reg0.DB_MAX_OUTPUT_PORT_TYPE
pwm_pinb <= pwm_pinb~reg0.DB_MAX_OUTPUT_PORT_TYPE
t200khz <= clk200khz.DB_MAX_OUTPUT_PORT_TYPE