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📁 用VHDL语言写的程序实例
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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--A1L23 is cpu_read~1032 at LC83
A1L23_p1_out = count_ad[0] & !port_no[0] & !port_no[2] & !port_no[1];
A1L23_p2_out = port_no[0] & !port_no[2] & !port_no[1] & count_ad[8];
A1L23_p3_out = port_no[2] & C2_dffs[0];
A1L23_p4_out = port_no[1] & C2_dffs[0];
A1L23_or_out = A1L23_p1_out # A1L23_p2_out # A1L23_p3_out # A1L23_p4_out;
A1L23 = A1L23_or_out;


--A1L33 is cpu_read~1035 at LC16
A1L33_p1_out = cs & !port_no[2] & !rd & !port_no[0];
A1L33_p2_out = cs & !port_no[2] & !rd & !port_no[1];
A1L33_or_out = A1L33_p1_out # A1L33_p2_out;
A1L33 = A1L33_or_out;


--A1L43 is cpu_read~1040 at LC85
A1L43_p1_out = count_ad[1] & !port_no[0] & !port_no[2] & !port_no[1];
A1L43_p2_out = port_no[0] & !port_no[2] & !port_no[1] & count_ad[9];
A1L43_p3_out = port_no[2] & C2_dffs[1];
A1L43_p4_out = port_no[1] & C2_dffs[1];
A1L43_or_out = A1L43_p1_out # A1L43_p2_out # A1L43_p3_out # A1L43_p4_out;
A1L43 = A1L43_or_out;


--A1L53 is cpu_read~1045 at LC86
A1L53_p1_out = count_ad[2] & !port_no[0] & !port_no[2] & !port_no[1];
A1L53_p2_out = port_no[0] & !port_no[2] & !port_no[1] & count_ad[10];
A1L53_p3_out = port_no[2] & C2_dffs[2];
A1L53_p4_out = port_no[1] & C2_dffs[2];
A1L53_or_out = A1L53_p1_out # A1L53_p2_out # A1L53_p3_out # A1L53_p4_out;
A1L53 = A1L53_or_out;


--A1L63 is cpu_read~1050 at LC88
A1L63_p1_out = count_ad[3] & !port_no[0] & !port_no[2] & !port_no[1];
A1L63_p2_out = port_no[0] & !port_no[2] & !port_no[1] & count_ad[11];
A1L63_p3_out = port_no[2] & C2_dffs[3];
A1L63_p4_out = port_no[1] & C2_dffs[3];
A1L63_or_out = A1L63_p1_out # A1L63_p2_out # A1L63_p3_out # A1L63_p4_out;
A1L63 = A1L63_or_out;


--A1L73 is cpu_read~1056 at LC91
A1L73_p0_out = !C2_dffs[1] & C2_dffs[0] & keyin[1] & port_no[1];
A1L73_p1_out = port_no[2] & !C2_dffs[1] & C2_dffs[0] & keyin[1];
A1L73_p2_out = C2_dffs[1] & !C2_dffs[0] & keyin[2] & port_no[1];
A1L73_p3_out = C2_dffs[1] & C2_dffs[0] & port_no[1] & keyin[3];
A1L73_p4_out = !C2_dffs[1] & !C2_dffs[0] & port_no[1] & keyin[0];
A1L73_or_out = A1L14 # A1L73_p0_out # A1L73_p1_out # A1L73_p2_out # A1L73_p3_out # A1L73_p4_out;
A1L73 = A1L73_or_out;


--A1L83 is cpu_read~1058 at LC93
A1L83_p1_out = !port_no[0] & !port_no[2] & !port_no[1] & count_ad[5];
A1L83_or_out = A1L83_p1_out;
A1L83 = A1L83_or_out;


--A1L93 is cpu_read~1060 at LC94
A1L93_p1_out = !port_no[0] & !port_no[2] & !port_no[1] & count_ad[6];
A1L93_or_out = A1L93_p1_out;
A1L93 = A1L93_or_out;


--A1L04 is cpu_read~1062 at LC97
A1L04_p1_out = !port_no[0] & !port_no[2] & !port_no[1] & count_ad[7];
A1L04_or_out = A1L04_p1_out;
A1L04 = A1L04_or_out;


--port_no[1] is port_no[1] at LC49
port_no[1]_or_out = A1L25;
port_no[1]_reg_input = port_no[1]_or_out;
port_no[1] = DFFE(port_no[1]_reg_input, !ale, , , );


--port_no[0] is port_no[0] at LC39
port_no[0]_or_out = A1L05;
port_no[0]_reg_input = port_no[0]_or_out;
port_no[0] = DFFE(port_no[0]_reg_input, !ale, , , );


--A1L77 is lcdcs1~2 at LC51
A1L77_or_out = !lcdcs1;
A1L77 = A1L77_or_out;


--\divider:count_divider[0] is \divider:count_divider[0] at LC118
\divider:count_divider[0]_p1_out = !\divider:count_divider[4] & !\divider:count_divider[0];
\divider:count_divider[0]_p2_out = !\divider:count_divider[0] & !\divider:count_divider[3] & !\divider:count_divider[2];
\divider:count_divider[0]_or_out = \divider:count_divider[0]_p1_out # \divider:count_divider[0]_p2_out;
\divider:count_divider[0]_reg_input = \divider:count_divider[0]_or_out;
\divider:count_divider[0] = DFFE(\divider:count_divider[0]_reg_input, !GLOBAL(clk8mhz), , , );


--clk2mhz is clk2mhz at LC126
clk2mhz_p1_out = !\divider:count_divider[4] & !\divider:count_divider[0] & clk2mhz;
clk2mhz_p2_out = !\divider:count_divider[4] & \divider:count_divider[0] & !clk2mhz;
clk2mhz_p3_out = \divider:count_divider[0] & !clk2mhz & !\divider:count_divider[3] & !\divider:count_divider[2];
clk2mhz_p4_out = !\divider:count_divider[0] & clk2mhz & !\divider:count_divider[3] & !\divider:count_divider[2];
clk2mhz_or_out = clk2mhz_p1_out # clk2mhz_p2_out # clk2mhz_p3_out # clk2mhz_p4_out;
clk2mhz_reg_input = clk2mhz_or_out;
clk2mhz = DFFE(clk2mhz_reg_input, !GLOBAL(clk8mhz), , , );


--C1_dffs[0] is lpm_counter:count_rtl_1|dffs[0] at LC70
C1_dffs[0]_or_out = !reset;
C1_dffs[0]_reg_input = C1_dffs[0]_or_out;
C1_dffs[0] = TFFE(C1_dffs[0]_reg_input, !clk2mhz, , , );


--C1_dffs[1] is lpm_counter:count_rtl_1|dffs[1] at LC74
C1_dffs[1]_p1_out = C1_dffs[0] & !reset;
C1_dffs[1]_or_out = C1_dffs[1]_p1_out;
C1_dffs[1]_reg_input = C1_dffs[1]_or_out;
C1_dffs[1] = TFFE(C1_dffs[1]_reg_input, !clk2mhz, , , );


--\divider:count_divider[2] is \divider:count_divider[2] at LC121
\divider:count_divider[2]_p1_out = !\divider:count_divider[4] & clk2mhz & \divider:count_divider[0];
\divider:count_divider[2]_p2_out = \divider:count_divider[4] & \divider:count_divider[2];
\divider:count_divider[2]_or_out = \divider:count_divider[2]_p1_out # \divider:count_divider[2]_p2_out;
\divider:count_divider[2]_reg_input = \divider:count_divider[2]_or_out;
\divider:count_divider[2] = TFFE(\divider:count_divider[2]_reg_input, !GLOBAL(clk8mhz), , , );


--C1_dffs[2] is lpm_counter:count_rtl_1|dffs[2] at LC9
C1_dffs[2]_p1_out = C1_dffs[1] & C1_dffs[0] & !reset;
C1_dffs[2]_or_out = C1_dffs[2]_p1_out;
C1_dffs[2]_reg_input = C1_dffs[2]_or_out;
C1_dffs[2] = TFFE(C1_dffs[2]_reg_input, !clk2mhz, , , );


--C1_dffs[3] is lpm_counter:count_rtl_1|dffs[3] at LC1
C1_dffs[3]_p1_out = C1_dffs[2] & C1_dffs[1] & C1_dffs[0] & !reset;
C1_dffs[3]_or_out = C1_dffs[3]_p1_out;
C1_dffs[3]_reg_input = C1_dffs[3]_or_out;
C1_dffs[3] = TFFE(C1_dffs[3]_reg_input, !clk2mhz, , , );


--\divider:count_divider[3] is \divider:count_divider[3] at LC117
\divider:count_divider[3]_p1_out = !\divider:count_divider[4] & \divider:count_divider[2] & clk2mhz & \divider:count_divider[0];
\divider:count_divider[3]_p2_out = \divider:count_divider[4] & \divider:count_divider[3];
\divider:count_divider[3]_or_out = \divider:count_divider[3]_p1_out # \divider:count_divider[3]_p2_out;
\divider:count_divider[3]_reg_input = \divider:count_divider[3]_or_out;
\divider:count_divider[3] = TFFE(\divider:count_divider[3]_reg_input, !GLOBAL(clk8mhz), , , );


--C1_dffs[4] is lpm_counter:count_rtl_1|dffs[4] at LC10
C1_dffs[4]_p1_out = C1_dffs[3] & C1_dffs[2] & C1_dffs[1] & C1_dffs[0] & !reset;
C1_dffs[4]_or_out = C1_dffs[4]_p1_out;
C1_dffs[4]_reg_input = C1_dffs[4]_or_out;
C1_dffs[4] = TFFE(C1_dffs[4]_reg_input, !clk2mhz, , , );


--C1_dffs[5] is lpm_counter:count_rtl_1|dffs[5] at LC122
C1_dffs[5]_p1_out = C1_dffs[4] & C1_dffs[3] & C1_dffs[2] & C1_dffs[1] & C1_dffs[0] & !reset;
C1_dffs[5]_or_out = C1_dffs[5]_p1_out;
C1_dffs[5]_reg_input = C1_dffs[5]_or_out;
C1_dffs[5] = TFFE(C1_dffs[5]_reg_input, !clk2mhz, , , );


--C1_dffs[6] is lpm_counter:count_rtl_1|dffs[6] at LC12
C1_dffs[6]_p1_out = C1_dffs[5] & C1_dffs[4] & C1_dffs[3] & C1_dffs[2] & C1_dffs[1] & C1_dffs[0] & !reset;
C1_dffs[6]_or_out = C1_dffs[6]_p1_out;
C1_dffs[6]_reg_input = C1_dffs[6]_or_out;
C1_dffs[6] = TFFE(C1_dffs[6]_reg_input, !clk2mhz, , , );


--\divider:count_divider[4] is \divider:count_divider[4] at LC15
\divider:count_divider[4]_p1_out = clk2mhz & \divider:count_divider[3] & \divider:count_divider[2] & \divider:count_divider[0] & !\divider:count_divider[4];
\divider:count_divider[4]_p2_out = !clk2mhz & !\divider:count_divider[3] & !\divider:count_divider[2] & \divider:count_divider[4];
\divider:count_divider[4]_p3_out = !\divider:count_divider[3] & !\divider:count_divider[2] & !\divider:count_divider[0] & \divider:count_divider[4];
\divider:count_divider[4]_or_out = \divider:count_divider[4]_p1_out # \divider:count_divider[4]_p2_out # \divider:count_divider[4]_p3_out;
\divider:count_divider[4]_reg_input = \divider:count_divider[4]_or_out;
\divider:count_divider[4] = DFFE(\divider:count_divider[4]_reg_input, !GLOBAL(clk8mhz), , , );


--C1_dffs[7] is lpm_counter:count_rtl_1|dffs[7] at LC123
C1_dffs[7]_p1_out = C1_dffs[6] & C1_dffs[5] & C1_dffs[4] & C1_dffs[3] & C1_dffs[2] & C1_dffs[1] & C1_dffs[0] & !reset;
C1_dffs[7]_or_out = C1_dffs[7]_p1_out;
C1_dffs[7]_reg_input = C1_dffs[7]_or_out;
C1_dffs[7] = TFFE(C1_dffs[7]_reg_input, !clk2mhz, , , );


--clk200khz is clk200khz at LC125
clk200khz_p1_out = !clk2mhz & !\divider:count_divider[3] & !\divider:count_divider[2];
clk200khz_p2_out = !\divider:count_divider[3] & !\divider:count_divider[2] & !\divider:count_divider[0];
clk200khz_or_out = clk200khz_p1_out # clk200khz_p2_out # !\divider:count_divider[4];
clk200khz_reg_input = !clk200khz_or_out;
clk200khz = TFFE(clk200khz_reg_input, !GLOBAL(clk8mhz), , , );


--count_ad[0] is count_ad[0] at LC32
count_ad[0]_p0_out = !A1L31Q & !A1L21Q & !count_ad[0];
count_ad[0]_p1_out = !begin_ad & !A1L31Q & !A1L21Q;
count_ad[0]_p2_out = A1L31Q & A1L21Q & count_ad[12];
count_ad[0]_p4_out = A1L31Q & A1L21Q & !adflag;
count_ad[0]_or_out = A1L581 # count_ad[0]_p0_out # count_ad[0]_p1_out # count_ad[0]_p2_out # count_ad[0]_p4_out;
count_ad[0]_reg_input = !count_ad[0]_or_out;
count_ad[0] = TFFE(count_ad[0]_reg_input, clk200khz, , , );


--C1_dffs[8] is lpm_counter:count_rtl_1|dffs[8] at LC114
C1_dffs[8]_p1_out = C1_dffs[7] & C1_dffs[6] & C1_dffs[5] & C1_dffs[4] & C1_dffs[3] & C1_dffs[2] & C1_dffs[1] & C1_dffs[0] & !reset;
C1_dffs[8]_or_out = C1_dffs[8]_p1_out;
C1_dffs[8]_reg_input = C1_dffs[8]_or_out;
C1_dffs[8] = TFFE(C1_dffs[8]_reg_input, !clk2mhz, , , );


--C2_dffs[0] is lpm_counter:scan_cnt_rtl_0|dffs[0] at LC81
C2_dffs[0]_p0_out = clk200khz & !C2_dffs[1] & C2_dffs[0] & keyin[1];
C2_dffs[0]_p1_out = keyin[2] & clk200khz & C2_dffs[1] & !C2_dffs[0];
C2_dffs[0]_p2_out = clk200khz & C2_dffs[1] & C2_dffs[0] & keyin[3];
C2_dffs[0]_p4_out = clk200khz & !C2_dffs[1] & !C2_dffs[0] & keyin[0];
C2_dffs[0]_or_out = C2_dffs[0]_p0_out # C2_dffs[0]_p1_out # C2_dffs[0]_p2_out # C2_dffs[0]_p4_out;
C2_dffs[0]_reg_input = C2_dffs[0]_or_out;
C2_dffs[0] = TFFE(C2_dffs[0]_reg_input, clk2mhz, , , );


--C1_dffs[9] is lpm_counter:count_rtl_1|dffs[9] at LC113
C1_dffs[9]_p1_out = C1_dffs[8] & C1_dffs[7] & C1_dffs[6] & C1_dffs[5] & C1_dffs[4] & C1_dffs[3] & C1_dffs[2] & C1_dffs[1] & C1_dffs[0] & !reset;
C1_dffs[9]_or_out = C1_dffs[9]_p1_out;
C1_dffs[9]_reg_input = C1_dffs[9]_or_out;
C1_dffs[9] = TFFE(C1_dffs[9]_reg_input, !clk2mhz, , , );


--count_ad[1] is count_ad[1] at LC23
count_ad[1]_p0_out = A1L31Q & !A1L41Q & count_ad[0] & !count_ad[12] & adflag;
count_ad[1]_p1_out = begin_ad & !A1L21Q & !A1L31Q & !A1L41Q & count_ad[1];
count_ad[1]_p2_out = A1L21Q & !A1L31Q & !A1L41Q & count_ad[0];
count_ad[1]_p4_out = !A1L21Q & A1L31Q & !A1L41Q & count_ad[0];
count_ad[1]_or_out = A1L681 # count_ad[1]_p0_out # count_ad[1]_p1_out # count_ad[1]_p2_out # count_ad[1]_p4_out;
count_ad[1]_reg_input = count_ad[1]_or_out;
count_ad[1] = TFFE(count_ad[1]_reg_input, clk200khz, , , );


--C2_dffs[1] is lpm_counter:scan_cnt_rtl_0|dffs[1] at LC28
C2_dffs[1]_p1_out = C2_dffs[0] & keyin[3] & clk200khz & C2_dffs[1];
C2_dffs[1]_p2_out = C2_dffs[0] & clk200khz & !C2_dffs[1] & keyin[1];
C2_dffs[1]_or_out = C2_dffs[1]_p1_out # C2_dffs[1]_p2_out;
C2_dffs[1]_reg_input = C2_dffs[1]_or_out;
C2_dffs[1] = TFFE(C2_dffs[1]_reg_input, clk2mhz, , , );


--C1_dffs[10] is lpm_counter:count_rtl_1|dffs[10] at LC128
C1_dffs[10]_p1_out = C1_dffs[9] & C1_dffs[8] & C1_dffs[7] & C1_dffs[6] & C1_dffs[5] & C1_dffs[4] & C1_dffs[3] & C1_dffs[2] & C1_dffs[1] & C1_dffs[0] & !reset;
C1_dffs[10]_or_out = C1_dffs[10]_p1_out;
C1_dffs[10]_reg_input = C1_dffs[10]_or_out;
C1_dffs[10] = TFFE(C1_dffs[10]_reg_input, !clk2mhz, , , );


--C2_dffs[2] is lpm_counter:scan_cnt_rtl_0|dffs[2] at LC18
C2_dffs[2]_p1_out = C2_dffs[1] & C2_dffs[0] & keyin[3] & clk200khz;
C2_dffs[2]_or_out = C2_dffs[2]_p1_out;
C2_dffs[2]_reg_input = C2_dffs[2]_or_out;
C2_dffs[2] = TFFE(C2_dffs[2]_reg_input, clk2mhz, , , );


--C1_dffs[11] is lpm_counter:count_rtl_1|dffs[11] at LC124
C1_dffs[11]_p1_out = C1_dffs[10] & C1_dffs[9] & C1_dffs[8] & C1_dffs[7] & C1_dffs[6] & C1_dffs[5] & C1_dffs[4] & C1_dffs[3] & C1_dffs[2] & C1_dffs[1] & C1_dffs[0] & !reset;
C1_dffs[11]_or_out = C1_dffs[11]_p1_out;
C1_dffs[11]_reg_input = C1_dffs[11]_or_out;
C1_dffs[11] = TFFE(C1_dffs[11]_reg_input, !clk2mhz, , , );


--C2_dffs[3] is lpm_counter:scan_cnt_rtl_0|dffs[3] at LC20
C2_dffs[3]_p1_out = C2_dffs[2] & C2_dffs[1] & C2_dffs[0] & keyin[3] & clk200khz;
C2_dffs[3]_or_out = C2_dffs[3]_p1_out;
C2_dffs[3]_reg_input = C2_dffs[3]_or_out;
C2_dffs[3] = TFFE(C2_dffs[3]_reg_input, clk2mhz, , , );


--A1L181 is reduce_nor~66 at LC13
A1L181_p1_out = !C2_dffs[3] & !C2_dffs[2];
A1L181_or_out = A1L181_p1_out;
A1L181 = !(A1L181_or_out);


--A1L281 is reduce_nor~70 at LC8
A1L281_p1_out = C2_dffs[3] & !C2_dffs[2];
A1L281_or_out = A1L281_p1_out;
A1L281 = !(A1L281_or_out);


--A1L381 is reduce_nor~73 at LC11
A1L381_p1_out = !C2_dffs[3] & C2_dffs[2];
A1L381_or_out = A1L381_p1_out;
A1L381 = !(A1L381_or_out);


--count_ad[3] is count_ad[3] at LC5
count_ad[3]_p0_out = A1L31Q & !A1L41Q & count_ad[2] & count_ad[0] & count_ad[1] & !count_ad[12] & adflag;
count_ad[3]_p1_out = begin_ad & !A1L21Q & !A1L31Q & !A1L41Q & count_ad[3];
count_ad[3]_p2_out = A1L21Q & !A1L31Q & !A1L41Q & count_ad[2] & count_ad[0] & count_ad[1];
count_ad[3]_p4_out = !A1L21Q & A1L31Q & !A1L41Q & count_ad[2] & count_ad[0] & count_ad[1];
count_ad[3]_or_out = A1L781 # count_ad[3]_p0_out # count_ad[3]_p1_out # count_ad[3]_p2_out # count_ad[3]_p4_out;
count_ad[3]_reg_input = count_ad[3]_or_out;
count_ad[3] = TFFE(count_ad[3]_reg_input, clk200khz, , , );


--A1L57 is keyout~13 at LC6
A1L57_p1_out = C2_dffs[3] & !C2_dffs[2];
A1L57_or_out = !C2_dffs[3];
A1L57 = A1L57_p1_out $ A1L57_or_out;


--count_ad[4] is count_ad[4] at LC99
count_ad[4]_p0_out = A1L31Q & !A1L41Q & count_ad[3] & count_ad[2] & count_ad[0] & count_ad[1] & !count_ad[12] & adflag;
count_ad[4]_p1_out = begin_ad & !A1L21Q & !A1L31Q & !A1L41Q & count_ad[4];
count_ad[4]_p2_out = A1L21Q & !A1L31Q & !A1L41Q & count_ad[3] & count_ad[2] & count_ad[0] & count_ad[1];
count_ad[4]_p4_out = !A1L21Q & A1L31Q & !A1L41Q & count_ad[3] & count_ad[2] & count_ad[0] & count_ad[1];
count_ad[4]_or_out = A1L881 # count_ad[4]_p0_out # count_ad[4]_p1_out # count_ad[4]_p2_out # count_ad[4]_p4_out;
count_ad[4]_reg_input = count_ad[4]_or_out;
count_ad[4] = TFFE(count_ad[4]_reg_input, clk200khz, , , );


--count_ad[5] is count_ad[5] at LC103
count_ad[5]_p0_out = A1L31Q & !A1L41Q & count_ad[4] & count_ad[3] & count_ad[2] & count_ad[0] & count_ad[1] & !count_ad[12] & adflag;
count_ad[5]_p1_out = begin_ad & !A1L21Q & !A1L31Q & !A1L41Q & count_ad[5];
count_ad[5]_p2_out = A1L21Q & !A1L31Q & !A1L41Q & count_ad[4] & count_ad[3] & count_ad[2] & count_ad[0] & count_ad[1];
count_ad[5]_p4_out = !A1L21Q & A1L31Q & !A1L41Q & count_ad[4] & count_ad[3] & count_ad[2] & count_ad[0] & count_ad[1];
count_ad[5]_or_out = A1L981 # count_ad[5]_p0_out # count_ad[5]_p1_out # count_ad[5]_p2_out # count_ad[5]_p4_out;
count_ad[5]_reg_input = count_ad[5]_or_out;
count_ad[5] = TFFE(count_ad[5]_reg_input, clk200khz, , , );


--count_ad[6] is count_ad[6] at LC106

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