📄 at91sam9260_dma.html
字号:
<html><head>
<meta charset="iso-8859-1" content="Arm / ATMEL/ AT91 library / AT91SAM9260" http-equiv="Content-Type">
<title>Hardware API Selector: AT91SAM9260 Definitions</title>
</head>
<h1>DMA controller from Synopsys Peripheral</h1>
<null><a name="DMA"></a><b>DMA</b> <i><font size="-1">(<a href="AT91SAM9260_h.html#AT91S_DMA">AT91S_DMA</a>)</font></i><b> 0x00800000 </b><i><font size="-1">(<a href="AT91SAM9260_h.html#AT91C_BASE_DMA">AT91C_BASE_DMA</a>)</font></i>
<table border=1 cellpadding=3 cellspacing=0><null><th bgcolor="#FFFFCC"><font size="-1">Periph ID <a href="#AIC">AIC</a></font></th><th bgcolor="#FFFFCC"><font size="-1">Symbol</font></th><th bgcolor="#FFFFCC"><font size="-1">Description</font></th><tr><td bgcolor="#FFFFCC"><font size="-1"><b>27</b> </font></td><td><font size="-1"><i><font size="-1">(<a href="AT91SAM9260_h.html#AT91C_ID_DMA">AT91C_ID_DMA</a>)</font></i></font></td><td><font size="-1">DMA Controller</font></td></tr>
</null></table><br><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><font size="-1"><b>Function</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Description</b></font></th><tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9260_h.html#AT91F_DMA_CfgPMC">AT91F_DMA_CfgPMC</a></b></font></td><td><font size="-1">Enable Peripheral clock in PMC for DMA</font></td></tr>
</null></table><br><br></null><a name="DMA"></a><h2>DMA Software API <i><font size="-1">(<a href="AT91SAM9260_h.html#AT91S_DMA">AT91S_DMA</a>)</font></i></h2>
<a name="DMA"></a><null><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><font size="-1"><b>Offset</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Field</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Description</b></font></th>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x0</b></font></td><td><font size="-1">DMA_SAR0 (<a href="#DMA_SAR">DMA_SAR</a>)</font></td><td><font size="-1">Source Address Register for channel 0</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x8</b></font></td><td><font size="-1">DMA_DAR0 (<a href="#DMA_DAR">DMA_DAR</a>)</font></td><td><font size="-1">Destination Address Register for channel 0</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x10</b></font></td><td><font size="-1">DMA_LLP0 (<a href="#DMA_LLP">DMA_LLP</a>)</font></td><td><font size="-1">Linked List Pointer Register for channel 0</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x18</b></font></td><td><font size="-1">DMA_CTL0l (<a href="#DMA_CTLl">DMA_CTLl</a>)</font></td><td><font size="-1">Control Register for channel 0 - low</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x1C</b></font></td><td><font size="-1">DMA_CTL0h (<a href="#DMA_CTLh">DMA_CTLh</a>)</font></td><td><font size="-1">Control Register for channel 0 - high</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x20</b></font></td><td><font size="-1">DMA_SSTAT0 (<a href="#DMA_SSTAT">DMA_SSTAT</a>)</font></td><td><font size="-1">Source Status Register for channel 0</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x28</b></font></td><td><font size="-1">DMA_DSTAT0 (<a href="#DMA_DSTAT">DMA_DSTAT</a>)</font></td><td><font size="-1">Destination Status Register for channel 0</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x30</b></font></td><td><font size="-1">DMA_SSTATAR0 (<a href="#DMA_SSTATAR">DMA_SSTATAR</a>)</font></td><td><font size="-1">Source Status Adress Register for channel 0</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x38</b></font></td><td><font size="-1">DMA_DSTATAR0 (<a href="#DMA_DSTATAR">DMA_DSTATAR</a>)</font></td><td><font size="-1">Destination Status Adress Register for channel 0</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x40</b></font></td><td><font size="-1">DMA_CFG0l (<a href="#DMA_CFGl">DMA_CFGl</a>)</font></td><td><font size="-1">Configuration Register for channel 0 - low</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x44</b></font></td><td><font size="-1">DMA_CFG0h (<a href="#DMA_CFGh">DMA_CFGh</a>)</font></td><td><font size="-1">Configuration Register for channel 0 - high</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x48</b></font></td><td><font size="-1">DMA_SGR0 (<a href="#DMA_SGR">DMA_SGR</a>)</font></td><td><font size="-1">Source Gather Register for channel 0</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x50</b></font></td><td><font size="-1">DMA_DSR0 (<a href="#DMA_DSR">DMA_DSR</a>)</font></td><td><font size="-1">Destination Scatter Register for channel 0</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x58</b></font></td><td><font size="-1">DMA_SAR1 (<a href="#DMA_SAR">DMA_SAR</a>)</font></td><td><font size="-1">Source Address Register for channel 1</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x60</b></font></td><td><font size="-1">DMA_DAR1 (<a href="#DMA_DAR">DMA_DAR</a>)</font></td><td><font size="-1">Destination Address Register for channel 1</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x68</b></font></td><td><font size="-1">DMA_LLP1 (<a href="#DMA_LLP">DMA_LLP</a>)</font></td><td><font size="-1">Linked List Pointer Register for channel 1</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x70</b></font></td><td><font size="-1">DMA_CTL1l (<a href="#DMA_CTLl">DMA_CTLl</a>)</font></td><td><font size="-1">Control Register for channel 1 - low</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x74</b></font></td><td><font size="-1">DMA_CTL1h (<a href="#DMA_CTLh">DMA_CTLh</a>)</font></td><td><font size="-1">Control Register for channel 1 - high</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x78</b></font></td><td><font size="-1">DMA_SSTAT1 (<a href="#DMA_SSTAT">DMA_SSTAT</a>)</font></td><td><font size="-1">Source Status Register for channel 1</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x80</b></font></td><td><font size="-1">DMA_DSTAT1 (<a href="#DMA_DSTAT">DMA_DSTAT</a>)</font></td><td><font size="-1">Destination Status Register for channel 1</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x88</b></font></td><td><font size="-1">DMA_SSTATAR1 (<a href="#DMA_SSTATAR">DMA_SSTATAR</a>)</font></td><td><font size="-1">Source Status Adress Register for channel 1</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x90</b></font></td><td><font size="-1">DMA_DSTATAR1 (<a href="#DMA_DSTATAR">DMA_DSTATAR</a>)</font></td><td><font size="-1">Destination Status Adress Register for channel 1</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x98</b></font></td><td><font size="-1">DMA_CFG1l (<a href="#DMA_CFGl">DMA_CFGl</a>)</font></td><td><font size="-1">Configuration Register for channel 1 - low</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x9C</b></font></td><td><font size="-1">DMA_CFG1h (<a href="#DMA_CFGh">DMA_CFGh</a>)</font></td><td><font size="-1">Configuration Register for channel 1 - high</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xA0</b></font></td><td><font size="-1">DMA_SGR1 (<a href="#DMA_SGR">DMA_SGR</a>)</font></td><td><font size="-1">Source Gather Register for channel 1</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xA8</b></font></td><td><font size="-1">DMA_DSR1 (<a href="#DMA_DSR">DMA_DSR</a>)</font></td><td><font size="-1">Destination Scatter Register for channel 1</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x2C0</b></font></td><td><font size="-1"><a href="AT91SAM9260_DMA.html#DMA_RAWTFR">DMA_RAWTFR</a></font></td><td><font size="-1">Raw Status for IntTfr Interrupt</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x2C8</b></font></td><td><font size="-1"><a href="AT91SAM9260_DMA.html#DMA_RAWBLOCK">DMA_RAWBLOCK</a></font></td><td><font size="-1">Raw Status for IntBlock Interrupt</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x2D0</b></font></td><td><font size="-1"><a href="AT91SAM9260_DMA.html#DMA_RAWSRCTRAN">DMA_RAWSRCTRAN</a></font></td><td><font size="-1">Raw Status for IntSrcTran Interrupt</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x2D8</b></font></td><td><font size="-1"><a href="AT91SAM9260_DMA.html#DMA_RAWDSTTRAN">DMA_RAWDSTTRAN</a></font></td><td><font size="-1">Raw Status for IntDstTran Interrupt</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x2E0</b></font></td><td><font size="-1"><a href="AT91SAM9260_DMA.html#DMA_RAWERR">DMA_RAWERR</a></font></td><td><font size="-1">Raw Status for IntErr Interrupt</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x2E8</b></font></td><td><font size="-1"><a href="AT91SAM9260_DMA.html#DMA_STATUSTFR">DMA_STATUSTFR</a></font></td><td><font size="-1">Status for IntTfr Interrupt</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x2F0</b></font></td><td><font size="-1"><a href="AT91SAM9260_DMA.html#DMA_STATUSBLOCK">DMA_STATUSBLOCK</a></font></td><td><font size="-1">Status for IntBlock Interrupt</font></td></tr>
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -