⭐ 欢迎来到虫虫下载站！ | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站
📤 上传资源

📄 at91sam9261_h.html

📁 AT91SAM 系列微控制器的NAND Flash支持代码 描述怎样将NAND Flash和AT91SAM 系列微控制器连接起来。
💻 HTML
📖 第 1 页 / 共 5 页
字号:
🔍
12345 
	<a href="#AT91_REG">AT91_REG</a>	 PIOC_PPUDR; 	<font color=#B22222>// Pull-up Disable Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 PIOC_PPUER; 	<font color=#B22222>// Pull-up Enable Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 PIOC_PPUSR; 	<font color=#B22222>// Pull-up Status Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 Reserved30[1]; 	<font color=#B22222>// </font>
	<a href="#AT91_REG">AT91_REG</a>	 PIOC_ASR; 	<font color=#B22222>// Select A Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 PIOC_BSR; 	<font color=#B22222>// Select B Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 PIOC_ABSR; 	<font color=#B22222>// AB Select Status Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 Reserved31[9]; 	<font color=#B22222>// </font>
	<a href="#AT91_REG">AT91_REG</a>	 PIOC_OWER; 	<font color=#B22222>// Output Write Enable Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 PIOC_OWDR; 	<font color=#B22222>// Output Write Disable Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 PIOC_OWSR; 	<font color=#B22222>// Output Write Status Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 Reserved32[213]; 	<font color=#B22222>// </font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_PMC.html#PMC_SCER">PMC_SCER</a>; 	<font color=#B22222>// System Clock Enable Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_PMC.html#PMC_SCDR">PMC_SCDR</a>; 	<font color=#B22222>// System Clock Disable Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_PMC.html#PMC_SCSR">PMC_SCSR</a>; 	<font color=#B22222>// System Clock Status Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 Reserved33[1]; 	<font color=#B22222>// </font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_PMC.html#PMC_PCER">PMC_PCER</a>; 	<font color=#B22222>// Peripheral Clock Enable Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_PMC.html#PMC_PCDR">PMC_PCDR</a>; 	<font color=#B22222>// Peripheral Clock Disable Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_PMC.html#PMC_PCSR">PMC_PCSR</a>; 	<font color=#B22222>// Peripheral Clock Status Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 Reserved34[1]; 	<font color=#B22222>// </font>
	<a href="#AT91_REG">AT91_REG</a>	 PMC_MOR; 	<font color=#B22222>// Main Oscillator Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 PMC_MCFR; 	<font color=#B22222>// Main Clock  Frequency Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 PMC_PLLAR; 	<font color=#B22222>// PLL A Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 PMC_PLLBR; 	<font color=#B22222>// PLL B Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_PMC.html#PMC_MCKR">PMC_MCKR</a>; 	<font color=#B22222>// Master Clock Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 Reserved35[3]; 	<font color=#B22222>// </font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_PMC.html#PMC_PCKR">PMC_PCKR</a>[8]; 	<font color=#B22222>// Programmable Clock Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_PMC.html#PMC_IER">PMC_IER</a>; 	<font color=#B22222>// Interrupt Enable Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_PMC.html#PMC_IDR">PMC_IDR</a>; 	<font color=#B22222>// Interrupt Disable Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_PMC.html#PMC_SR">PMC_SR</a>; 	<font color=#B22222>// Status Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_PMC.html#PMC_IMR">PMC_IMR</a>; 	<font color=#B22222>// Interrupt Mask Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 Reserved36[36]; 	<font color=#B22222>// </font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_RSTC.html#RSTC_RCR">RSTC_RCR</a>; 	<font color=#B22222>// Reset Control Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_RSTC.html#RSTC_RSR">RSTC_RSR</a>; 	<font color=#B22222>// Reset Status Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_RSTC.html#RSTC_RMR">RSTC_RMR</a>; 	<font color=#B22222>// Reset Mode Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 Reserved37[1]; 	<font color=#B22222>// </font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_SHDWC.html#SHDWC_SHCR">SHDWC_SHCR</a>; 	<font color=#B22222>// Shut Down Control Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_SHDWC.html#SHDWC_SHMR">SHDWC_SHMR</a>; 	<font color=#B22222>// Shut Down Mode Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_SHDWC.html#SHDWC_SHSR">SHDWC_SHSR</a>; 	<font color=#B22222>// Shut Down Status Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 Reserved38[1]; 	<font color=#B22222>// </font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_RTTC.html#RTTC_RTMR">RTTC_RTMR</a>; 	<font color=#B22222>// Real-time Mode Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_RTTC.html#RTTC_RTAR">RTTC_RTAR</a>; 	<font color=#B22222>// Real-time Alarm Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_RTTC.html#RTTC_RTVR">RTTC_RTVR</a>; 	<font color=#B22222>// Real-time Value Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_RTTC.html#RTTC_RTSR">RTTC_RTSR</a>; 	<font color=#B22222>// Real-time Status Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_PITC.html#PITC_PIMR">PITC_PIMR</a>; 	<font color=#B22222>// Period Interval Mode Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_PITC.html#PITC_PISR">PITC_PISR</a>; 	<font color=#B22222>// Period Interval Status Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_PITC.html#PITC_PIVR">PITC_PIVR</a>; 	<font color=#B22222>// Period Interval Value Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_PITC.html#PITC_PIIR">PITC_PIIR</a>; 	<font color=#B22222>// Period Interval Image Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_WDTC.html#WDTC_WDCR">WDTC_WDCR</a>; 	<font color=#B22222>// Watchdog Control Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_WDTC.html#WDTC_WDMR">WDTC_WDMR</a>; 	<font color=#B22222>// Watchdog Mode Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_WDTC.html#WDTC_WDSR">WDTC_WDSR</a>; 	<font color=#B22222>// Watchdog Status Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 Reserved39[1]; 	<font color=#B22222>// </font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_SYS.html#SYS_GPBR0">SYS_GPBR0</a>; 	<font color=#B22222>// General Purpose Register 0</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_SYS.html#SYS_GPBR1">SYS_GPBR1</a>; 	<font color=#B22222>// General Purpose Register 1</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_SYS.html#SYS_GPBR2">SYS_GPBR2</a>; 	<font color=#B22222>// General Purpose Register 2</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_SYS.html#SYS_GPBR3">SYS_GPBR3</a>; 	<font color=#B22222>// General Purpose Register 3</font>
} <b><a name="AT91S_SYS">AT91S_SYS</a></b>, *<b><a name="AT91PS_SYS">AT91PS_SYS</a></b>;

<font color=#B22222>// -------- GPBR : (<a href="AT91SAM9261_SYS.html#SYS">SYS</a> Offset: 0x1350) GPBR General Purpose Register -------- </font>
<font color=#B22222>// -------- GPBR : (<a href="AT91SAM9261_SYS.html#SYS">SYS</a> Offset: 0x1354) GPBR General Purpose Register -------- </font>
<font color=#B22222>// -------- GPBR : (<a href="AT91SAM9261_SYS.html#SYS">SYS</a> Offset: 0x1358) GPBR General Purpose Register -------- </font>
<font color=#B22222>// -------- GPBR : (<a href="AT91SAM9261_SYS.html#SYS">SYS</a> Offset: 0x135c) GPBR General Purpose Register -------- </font>

<font color=#B22222>// *****************************************************************************</font>
<font color=#B22222>//              SOFTWARE API DEFINITION  FOR SDRAM Controller Interface</font>
<font color=#B22222>// *****************************************************************************</font>
<font color=#0000FF>typedef</font> <font color=#0000FF>struct</font> <b><a name="_AT91S_SDRAMC">_AT91S_SDRAMC</a></b> {
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_SDRAMC.html#SDRAMC_MR">SDRAMC_MR</a>; 	<font color=#B22222>// SDRAM Controller Mode Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_SDRAMC.html#SDRAMC_TR">SDRAMC_TR</a>; 	<font color=#B22222>// SDRAM Controller Refresh Timer Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_SDRAMC.html#SDRAMC_CR">SDRAMC_CR</a>; 	<font color=#B22222>// SDRAM Controller Configuration Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_SDRAMC.html#SDRAMC_HSR">SDRAMC_HSR</a>; 	<font color=#B22222>// SDRAM Controller High Speed Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_SDRAMC.html#SDRAMC_LPR">SDRAMC_LPR</a>; 	<font color=#B22222>// SDRAM Controller Low Power Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_SDRAMC.html#SDRAMC_IER">SDRAMC_IER</a>; 	<font color=#B22222>// SDRAM Controller Interrupt Enable Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_SDRAMC.html#SDRAMC_IDR">SDRAMC_IDR</a>; 	<font color=#B22222>// SDRAM Controller Interrupt Disable Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_SDRAMC.html#SDRAMC_IMR">SDRAMC_IMR</a>; 	<font color=#B22222>// SDRAM Controller Interrupt Mask Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_SDRAMC.html#SDRAMC_ISR">SDRAMC_ISR</a>; 	<font color=#B22222>// SDRAM Controller Interrupt Mask Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_SDRAMC.html#SDRAMC_MDR">SDRAMC_MDR</a>; 	<font color=#B22222>// SDRAM Memory Device Register</font>
} <b><a name="AT91S_SDRAMC">AT91S_SDRAMC</a></b>, *<b><a name="AT91PS_SDRAMC">AT91PS_SDRAMC</a></b>;

<font color=#B22222>// -------- <a href="AT91SAM9261_SDRAMC.html#SDRAMC_MR">SDRAMC_MR</a> : (<a href="AT91SAM9261_SDRAMC.html#SDRAMC">SDRAMC</a> Offset: 0x0) SDRAM Controller Mode Register -------- </font>
<font color=#008200>#define</font> <b><a name="AT91C_SDRAMC_MODE">AT91C_SDRAMC_MODE</a></b>     ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0xF <<  0) <font color=#B22222>// (<a href="AT91SAM9261_SDRAMC.html#SDRAMC">SDRAMC</a>) Mode</font>
<font color=#008200>#define</font> 	<b><a name="AT91C_SDRAMC_MODE_NORMAL_CMD">AT91C_SDRAMC_MODE_NORMAL_CMD</a></b>           ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x0) <font color=#B22222>// (<a href="AT91SAM9261_SDRAMC.html#SDRAMC">SDRAMC</a>) Normal Mode</font>
<font color=#008200>#define</font> 	<b><a name="AT91C_SDRAMC_MODE_NOP_CMD">AT91C_SDRAMC_MODE_NOP_CMD</a></b>              ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x1) <font color=#B22222>// (<a href="AT91SAM9261_SDRAMC.html#SDRAMC">SDRAMC</a>) Issue a NOP Command at every access</font>
<font color=#008200>#define</font> 	<b><a name="AT91C_SDRAMC_MODE_PRCGALL_CMD">AT91C_SDRAMC_MODE_PRCGALL_CMD</a></b>          ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x2) <font color=#B22222>// (<a href="AT91SAM9261_SDRAMC.html#SDRAMC">SDRAMC</a>) Issue a All Banks Precharge Command at every access</font>
<font color=#008200>#define</font> 	<b><a name="AT91C_SDRAMC_MODE_LMR_CMD">AT91C_SDRAMC_MODE_LMR_CMD</a></b>              ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x3) <font color=#B22222>// (<a href="AT91SAM9261_SDRAMC.html#SDRAMC">SDRAMC</a>) Issue a Load Mode Register at every access</font>
<font color=#008200>#define</font> 	<b><a name="AT91C_SDRAMC_MODE_RFSH_CMD">AT91C_SDRAMC_MODE_RFSH_CMD</a></b>             ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x4) <font color=#B22222>// (<a href="AT91SAM9261_SDRAMC.html#SDRAMC">SDRAMC</a>) Issue a Refresh</font>
12345

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -