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📁 AT91SAM 系列微控制器的NAND Flash支持代码 描述怎样将NAND Flash和AT91SAM 系列微控制器连接起来。
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	<a href="#AT91_REG">AT91_REG</a>	 SMC_PULSE4; 	<font color=#B22222>//  Pulse Register <font color=#0000FF>for</font> CS 4</font>
	<a href="#AT91_REG">AT91_REG</a>	 SMC_CYCLE4; 	<font color=#B22222>//  Cycle Register <font color=#0000FF>for</font> CS 4</font>
	<a href="#AT91_REG">AT91_REG</a>	 SMC_CTRL4; 	<font color=#B22222>//  Control Register <font color=#0000FF>for</font> CS 4</font>
	<a href="#AT91_REG">AT91_REG</a>	 SMC_SETUP5; 	<font color=#B22222>//  Setup Register <font color=#0000FF>for</font> CS 5</font>
	<a href="#AT91_REG">AT91_REG</a>	 SMC_PULSE5; 	<font color=#B22222>//  Pulse Register <font color=#0000FF>for</font> CS 5</font>
	<a href="#AT91_REG">AT91_REG</a>	 SMC_CYCLE5; 	<font color=#B22222>//  Cycle Register <font color=#0000FF>for</font> CS 5</font>
	<a href="#AT91_REG">AT91_REG</a>	 SMC_CTRL5; 	<font color=#B22222>//  Control Register <font color=#0000FF>for</font> CS 5</font>
	<a href="#AT91_REG">AT91_REG</a>	 SMC_SETUP6; 	<font color=#B22222>//  Setup Register <font color=#0000FF>for</font> CS 6</font>
	<a href="#AT91_REG">AT91_REG</a>	 SMC_PULSE6; 	<font color=#B22222>//  Pulse Register <font color=#0000FF>for</font> CS 6</font>
	<a href="#AT91_REG">AT91_REG</a>	 SMC_CYCLE6; 	<font color=#B22222>//  Cycle Register <font color=#0000FF>for</font> CS 6</font>
	<a href="#AT91_REG">AT91_REG</a>	 SMC_CTRL6; 	<font color=#B22222>//  Control Register <font color=#0000FF>for</font> CS 6</font>
	<a href="#AT91_REG">AT91_REG</a>	 SMC_SETUP7; 	<font color=#B22222>//  Setup Register <font color=#0000FF>for</font> CS 7</font>
	<a href="#AT91_REG">AT91_REG</a>	 SMC_PULSE7; 	<font color=#B22222>//  Pulse Register <font color=#0000FF>for</font> CS 7</font>
	<a href="#AT91_REG">AT91_REG</a>	 SMC_CYCLE7; 	<font color=#B22222>//  Cycle Register <font color=#0000FF>for</font> CS 7</font>
	<a href="#AT91_REG">AT91_REG</a>	 SMC_CTRL7; 	<font color=#B22222>//  Control Register <font color=#0000FF>for</font> CS 7</font>
	<a href="#AT91_REG">AT91_REG</a>	 Reserved1[96]; 	<font color=#B22222>// </font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_MATRIX.html#MATRIX_MCFG">MATRIX_MCFG</a>; 	<font color=#B22222>//  Master Configuration Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_MATRIX.html#MATRIX_SCFG0">MATRIX_SCFG0</a>; 	<font color=#B22222>//  Slave Configuration Register 0</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_MATRIX.html#MATRIX_SCFG1">MATRIX_SCFG1</a>; 	<font color=#B22222>//  Slave Configuration Register 1</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_MATRIX.html#MATRIX_SCFG2">MATRIX_SCFG2</a>; 	<font color=#B22222>//  Slave Configuration Register 2</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_MATRIX.html#MATRIX_SCFG3">MATRIX_SCFG3</a>; 	<font color=#B22222>//  Slave Configuration Register 3</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_MATRIX.html#MATRIX_SCFG4">MATRIX_SCFG4</a>; 	<font color=#B22222>//  Slave Configuration Register 4</font>
	<a href="#AT91_REG">AT91_REG</a>	 Reserved2[3]; 	<font color=#B22222>// </font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_MATRIX.html#MATRIX_TCMR">MATRIX_TCMR</a>; 	<font color=#B22222>//  Slave 0 Special Function Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 Reserved3[2]; 	<font color=#B22222>// </font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_MATRIX.html#MATRIX_EBICSA">MATRIX_EBICSA</a>; 	<font color=#B22222>//  Slave 3 Special Function Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_MATRIX.html#MATRIX_USBPCR">MATRIX_USBPCR</a>; 	<font color=#B22222>//  Slave 4 Special Function Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 Reserved4[3]; 	<font color=#B22222>// </font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_MATRIX.html#MATRIX_VERSION">MATRIX_VERSION</a>; 	<font color=#B22222>//  Version Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 Reserved5[110]; 	<font color=#B22222>// </font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_AIC.html#AIC_SMR">AIC_SMR</a>[32]; 	<font color=#B22222>// Source Mode Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_AIC.html#AIC_SVR">AIC_SVR</a>[32]; 	<font color=#B22222>// Source Vector Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_AIC.html#AIC_IVR">AIC_IVR</a>; 	<font color=#B22222>// IRQ Vector Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_AIC.html#AIC_FVR">AIC_FVR</a>; 	<font color=#B22222>// FIQ Vector Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_AIC.html#AIC_ISR">AIC_ISR</a>; 	<font color=#B22222>// Interrupt Status Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_AIC.html#AIC_IPR">AIC_IPR</a>; 	<font color=#B22222>// Interrupt Pending Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_AIC.html#AIC_IMR">AIC_IMR</a>; 	<font color=#B22222>// Interrupt Mask Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_AIC.html#AIC_CISR">AIC_CISR</a>; 	<font color=#B22222>// Core Interrupt Status Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 Reserved6[2]; 	<font color=#B22222>// </font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_AIC.html#AIC_IECR">AIC_IECR</a>; 	<font color=#B22222>// Interrupt Enable Command Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_AIC.html#AIC_IDCR">AIC_IDCR</a>; 	<font color=#B22222>// Interrupt Disable Command Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_AIC.html#AIC_ICCR">AIC_ICCR</a>; 	<font color=#B22222>// Interrupt Clear Command Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_AIC.html#AIC_ISCR">AIC_ISCR</a>; 	<font color=#B22222>// Interrupt Set Command Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_AIC.html#AIC_EOICR">AIC_EOICR</a>; 	<font color=#B22222>// End of Interrupt Command Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_AIC.html#AIC_SPU">AIC_SPU</a>; 	<font color=#B22222>// Spurious Vector Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_AIC.html#AIC_DCR">AIC_DCR</a>; 	<font color=#B22222>// Debug Control Register (Protect)</font>
	<a href="#AT91_REG">AT91_REG</a>	 Reserved7[1]; 	<font color=#B22222>// </font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_AIC.html#AIC_FFER">AIC_FFER</a>; 	<font color=#B22222>// Fast Forcing Enable Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_AIC.html#AIC_FFDR">AIC_FFDR</a>; 	<font color=#B22222>// Fast Forcing Disable Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_AIC.html#AIC_FFSR">AIC_FFSR</a>; 	<font color=#B22222>// Fast Forcing Status Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 Reserved8[45]; 	<font color=#B22222>// </font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_DBGU.html#DBGU_CR">DBGU_CR</a>; 	<font color=#B22222>// Control Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_DBGU.html#DBGU_MR">DBGU_MR</a>; 	<font color=#B22222>// Mode Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_DBGU.html#DBGU_IER">DBGU_IER</a>; 	<font color=#B22222>// Interrupt Enable Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_DBGU.html#DBGU_IDR">DBGU_IDR</a>; 	<font color=#B22222>// Interrupt Disable Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_DBGU.html#DBGU_IMR">DBGU_IMR</a>; 	<font color=#B22222>// Interrupt Mask Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_DBGU.html#DBGU_CSR">DBGU_CSR</a>; 	<font color=#B22222>// Channel Status Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_DBGU.html#DBGU_RHR">DBGU_RHR</a>; 	<font color=#B22222>// Receiver Holding Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_DBGU.html#DBGU_THR">DBGU_THR</a>; 	<font color=#B22222>// Transmitter Holding Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_DBGU.html#DBGU_BRGR">DBGU_BRGR</a>; 	<font color=#B22222>// Baud Rate Generator Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 Reserved9[7]; 	<font color=#B22222>// </font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_DBGU.html#DBGU_CIDR">DBGU_CIDR</a>; 	<font color=#B22222>// Chip ID Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_DBGU.html#DBGU_EXID">DBGU_EXID</a>; 	<font color=#B22222>// Chip ID Extension Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 <a href="AT91SAM9261_DBGU.html#DBGU_FNTR">DBGU_FNTR</a>; 	<font color=#B22222>// Force NTRST Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 Reserved10[45]; 	<font color=#B22222>// </font>
	<a href="#AT91_REG">AT91_REG</a>	 DBGU_RPR; 	<font color=#B22222>// Receive Pointer Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 DBGU_RCR; 	<font color=#B22222>// Receive Counter Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 DBGU_TPR; 	<font color=#B22222>// Transmit Pointer Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 DBGU_TCR; 	<font color=#B22222>// Transmit Counter Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 DBGU_RNPR; 	<font color=#B22222>// Receive Next Pointer Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 DBGU_RNCR; 	<font color=#B22222>// Receive Next Counter Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 DBGU_TNPR; 	<font color=#B22222>// Transmit Next Pointer Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 DBGU_TNCR; 	<font color=#B22222>// Transmit Next Counter Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 DBGU_PTCR; 	<font color=#B22222>// <a href="AT91SAM9261_PDC.html#PDC">PDC</a> Transfer Control Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 DBGU_PTSR; 	<font color=#B22222>// <a href="AT91SAM9261_PDC.html#PDC">PDC</a> Transfer Status Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 Reserved11[54]; 	<font color=#B22222>// </font>
	<a href="#AT91_REG">AT91_REG</a>	 PIOA_PER; 	<font color=#B22222>// <a href="AT91SAM9261_PIO.html#PIO">PIO</a> Enable Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 PIOA_PDR; 	<font color=#B22222>// <a href="AT91SAM9261_PIO.html#PIO">PIO</a> Disable Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 PIOA_PSR; 	<font color=#B22222>// <a href="AT91SAM9261_PIO.html#PIO">PIO</a> Status Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 Reserved12[1]; 	<font color=#B22222>// </font>
	<a href="#AT91_REG">AT91_REG</a>	 PIOA_OER; 	<font color=#B22222>// Output Enable Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 PIOA_ODR; 	<font color=#B22222>// Output Disable Registerr</font>
	<a href="#AT91_REG">AT91_REG</a>	 PIOA_OSR; 	<font color=#B22222>// Output Status Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 Reserved13[1]; 	<font color=#B22222>// </font>
	<a href="#AT91_REG">AT91_REG</a>	 PIOA_IFER; 	<font color=#B22222>// Input Filter Enable Register</font>
	<a href="#AT91_REG">AT91_REG</a>	 PIOA_IFDR; 	<font color=#B22222>// Input Filter Disable Register</font>
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