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AT91SAM 系列微控制器的NAND Flash支持代码 描述怎样将NAND Flash和AT91SAM 系列微控制器连接起来。

<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x0</b></font></td><td><font size="-1"><a href="AT91SAM9261_SSC.html#SSC_CR">SSC_CR</a></font></td><td><font size="-1">Control Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x4</b></font></td><td><font size="-1"><a href="AT91SAM9261_SSC.html#SSC_CMR">SSC_CMR</a></font></td><td><font size="-1">Clock Mode Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x10</b></font></td><td><font size="-1"><a href="AT91SAM9261_SSC.html#SSC_RCMR">SSC_RCMR</a></font></td><td><font size="-1">Receive Clock ModeRegister</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x14</b></font></td><td><font size="-1"><a href="AT91SAM9261_SSC.html#SSC_RFMR">SSC_RFMR</a></font></td><td><font size="-1">Receive Frame Mode Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x18</b></font></td><td><font size="-1"><a href="AT91SAM9261_SSC.html#SSC_TCMR">SSC_TCMR</a></font></td><td><font size="-1">Transmit Clock Mode Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x1C</b></font></td><td><font size="-1"><a href="AT91SAM9261_SSC.html#SSC_TFMR">SSC_TFMR</a></font></td><td><font size="-1">Transmit Frame Mode Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x20</b></font></td><td><font size="-1"><a href="AT91SAM9261_SSC.html#SSC_RHR">SSC_RHR</a></font></td><td><font size="-1">Receive Holding Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x24</b></font></td><td><font size="-1"><a href="AT91SAM9261_SSC.html#SSC_THR">SSC_THR</a></font></td><td><font size="-1">Transmit Holding Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x30</b></font></td><td><font size="-1"><a href="AT91SAM9261_SSC.html#SSC_RSHR">SSC_RSHR</a></font></td><td><font size="-1">Receive Sync Holding Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x34</b></font></td><td><font size="-1"><a href="AT91SAM9261_SSC.html#SSC_TSHR">SSC_TSHR</a></font></td><td><font size="-1">Transmit Sync Holding Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x40</b></font></td><td><font size="-1"><a href="AT91SAM9261_SSC.html#SSC_SR">SSC_SR</a></font></td><td><font size="-1">Status Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x44</b></font></td><td><font size="-1"><a href="AT91SAM9261_SSC.html#SSC_IER">SSC_IER</a></font></td><td><font size="-1">Interrupt Enable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x48</b></font></td><td><font size="-1"><a href="AT91SAM9261_SSC.html#SSC_IDR">SSC_IDR</a></font></td><td><font size="-1">Interrupt Disable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x4C</b></font></td><td><font size="-1"><a href="AT91SAM9261_SSC.html#SSC_IMR">SSC_IMR</a></font></td><td><font size="-1">Interrupt Mask Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x100</b></font></td><td><font size="-1">SSC_RPR (<a href="AT91SAM9261_PDC.html#PDC_RPR">PDC_RPR</a>)</font></td><td><font size="-1">Receive Pointer Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x104</b></font></td><td><font size="-1">SSC_RCR (<a href="AT91SAM9261_PDC.html#PDC_RCR">PDC_RCR</a>)</font></td><td><font size="-1">Receive Counter Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x108</b></font></td><td><font size="-1">SSC_TPR (<a href="AT91SAM9261_PDC.html#PDC_TPR">PDC_TPR</a>)</font></td><td><font size="-1">Transmit Pointer Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x10C</b></font></td><td><font size="-1">SSC_TCR (<a href="AT91SAM9261_PDC.html#PDC_TCR">PDC_TCR</a>)</font></td><td><font size="-1">Transmit Counter Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x110</b></font></td><td><font size="-1">SSC_RNPR (<a href="AT91SAM9261_PDC.html#PDC_RNPR">PDC_RNPR</a>)</font></td><td><font size="-1">Receive Next Pointer Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x114</b></font></td><td><font size="-1">SSC_RNCR (<a href="AT91SAM9261_PDC.html#PDC_RNCR">PDC_RNCR</a>)</font></td><td><font size="-1">Receive Next Counter Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x118</b></font></td><td><font size="-1">SSC_TNPR (<a href="AT91SAM9261_PDC.html#PDC_TNPR">PDC_TNPR</a>)</font></td><td><font size="-1">Transmit Next Pointer Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x11C</b></font></td><td><font size="-1">SSC_TNCR (<a href="AT91SAM9261_PDC.html#PDC_TNCR">PDC_TNCR</a>)</font></td><td><font size="-1">Transmit Next Counter Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x120</b></font></td><td><font size="-1">SSC_PTCR (<a href="AT91SAM9261_PDC.html#PDC_PTCR">PDC_PTCR</a>)</font></td><td><font size="-1">PDC Transfer Control Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x124</b></font></td><td><font size="-1">SSC_PTSR (<a href="AT91SAM9261_PDC.html#PDC_PTSR">PDC_PTSR</a>)</font></td><td><font size="-1">PDC Transfer Status Register</font></td></tr>
</null></table><br><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><font size="-1"><b>Function</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Description</b></font></th><tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9261_h.html#AT91F_SSC_Configure">AT91F_SSC_Configure</a></b></font></td><td><font size="-1">Configure SSC</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9261_h.html#AT91F_SSC_DisableRx">AT91F_SSC_DisableRx</a></b></font></td><td><font size="-1">Disable receiving datas</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9261_h.html#AT91F_SSC_SendFrame">AT91F_SSC_SendFrame</a></b></font></td><td><font size="-1">Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initialized with Next Buffer, 0 if PDC is busy</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9261_h.html#AT91F_SSC_DisableIt">AT91F_SSC_DisableIt</a></b></font></td><td><font size="-1">Disable SSC IT</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9261_h.html#AT91F_SSC_EnableRx">AT91F_SSC_EnableRx</a></b></font></td><td><font size="-1">Enable receiving datas</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9261_h.html#AT91F_SSC_ReceiveFrame">AT91F_SSC_ReceiveFrame</a></b></font></td><td><font size="-1">Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initialized with Next Buffer, 0 if PDC is busy</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9261_h.html#AT91F_SSC_EnableIt">AT91F_SSC_EnableIt</a></b></font></td><td><font size="-1">Enable SSC IT</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9261_h.html#AT91F_SSC_SetBaudrate">AT91F_SSC_SetBaudrate</a></b></font></td><td><font size="-1">Set the baudrate according to the CPU clock</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9261_h.html#AT91F_SSC_IsInterruptMasked">AT91F_SSC_IsInterruptMasked</a></b></font></td><td><font size="-1">Test if SSC Interrupt is Masked </font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9261_h.html#AT91F_SSC_GetInterruptMaskStatus">AT91F_SSC_GetInterruptMaskStatus</a></b></font></td><td><font size="-1">Return SSC Interrupt Mask Status</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9261_h.html#AT91F_SSC_DisableTx">AT91F_SSC_DisableTx</a></b></font></td><td><font size="-1">Disable sending datas</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM9261_h.html#AT91F_SSC_EnableTx">AT91F_SSC_EnableTx</a></b></font></td><td><font size="-1">Enable sending datas</font></td></tr>
</null></table></null><h2>SSC Register Description</h2>
<null><a name="SSC_CR"></a><h4><a href="#SSC">SSC</a>: <i><a href="AT91SAM9261_h.html#AT91_REG">AT91_REG</a></i> SSC_CR  <i>Control Register</i></h4><ul><null><font size="-2"><li><b>SSC0</b> <i><a href="AT91SAM9261_h.html#AT91C_SSC0_CR">AT91C_SSC0_CR</a></i> 0xFFFBC000</font><font size="-2"><li><b>SSC1</b> <i><a href="AT91SAM9261_h.html#AT91C_SSC1_CR">AT91C_SSC1_CR</a></i> 0xFFFC0000</font><font size="-2"><li><b>SSC2</b> <i><a href="AT91SAM9261_h.html#AT91C_SSC2_CR">AT91C_SSC2_CR</a></i> 0xFFFC4000</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="SSC_RXEN"></a><b>SSC_RXEN</b><font size="-2"><br><a href="AT91SAM9261_h.html#AT91C_SSC_RXEN">AT91C_SSC_RXEN</a></font></td><td><b>Receive Enable</b><br>0: No effect.<br>1: Enables Receive if RXDIS is not set.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">1</td><td align="CENTER"><a name="SSC_RXDIS"></a><b>SSC_RXDIS</b><font size="-2"><br><a href="AT91SAM9261_h.html#AT91C_SSC_RXDIS">AT91C_SSC_RXDIS</a></font></td><td><b>Receive Disable</b><br>0: No effect.<br>1: Disables Receive.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">8</td><td align="CENTER"><a name="SSC_TXEN"></a><b>SSC_TXEN</b><font size="-2"><br><a href="AT91SAM9261_h.html#AT91C_SSC_TXEN">AT91C_SSC_TXEN</a></font></td><td><b>Transmit Enable</b><br>0: No effect.<br>1: Enables Transmit if TXDIS is not set.</td></tr>