dianti.rpt

一个使用VHDL语言设计的电梯控制程序

-- Equation name is 'dd3', location is LC3_C9, type is buried.
dd3      = DFFE( _EQ048, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ048 =  d44 & !_LC3_C15 & !q
         #  dd3 &  q
         #  dd3 &  _LC3_C15;

-- Node name is ':126' = 'dd4' 
-- Equation name is 'dd4', location is LC4_C6, type is buried.
dd4      = DFFE( _EQ049, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ049 =  d55 & !_LC3_C15 & !q
         #  dd4 &  q
         #  dd4 &  _LC3_C15;

-- Node name is ':125' = 'dd5' 
-- Equation name is 'dd5', location is LC6_C8, type is buried.
dd5      = DFFE( _EQ050, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ050 =  d66 & !_LC3_C15 & !q
         #  dd5 &  q
         #  dd5 &  _LC3_C15;

-- Node name is 'door0' 
-- Equation name is 'door0', type is output 
door0    =  _LC1_A24;

-- Node name is 'door1' 
-- Equation name is 'door1', type is output 
door1    =  _LC5_A27;

-- Node name is 'down' 
-- Equation name is 'down', type is output 
down     =  _LC3_A31;

-- Node name is 'd1~1' 
-- Equation name is 'd1~1', location is LC1_A16, type is buried.
-- synthesized logic cell 
_LC1_A16 = LCELL( _EQ051);
  _EQ051 = !d1 & !_LC4_A15;

-- Node name is 'd1~2' 
-- Equation name is 'd1~2', location is LC8_A16, type is buried.
-- synthesized logic cell 
_LC8_A16 = LCELL( _EQ052);
  _EQ052 = !d1 & !d2 & !_LC4_A15;

-- Node name is 'd1~3' 
-- Equation name is 'd1~3', location is LC1_C2, type is buried.
-- synthesized logic cell 
_LC1_C2  = LCELL( _EQ053);
  _EQ053 = !d1 & !d2 & !d3 & !_LC4_A15;

-- Node name is 'd1~4' 
-- Equation name is 'd1~4', location is LC5_C2, type is buried.
-- synthesized logic cell 
_LC5_C2  = LCELL( _EQ054);
  _EQ054 = !d4 & !d5 &  d6 &  _LC1_C2;

-- Node name is ':103' = 'd11' 
-- Equation name is 'd11', location is LC2_A2, type is buried.
d11      = DFFE( _EQ055, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ055 =  _LC6_A2
         #  d11 & !g1 &  q;

-- Node name is ':111' = 'd22' 
-- Equation name is 'd22', location is LC5_A16, type is buried.
d22      = DFFE( _EQ056, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ056 =  d22 &  _LC6_A16
         #  d2 &  _LC1_A16;

-- Node name is ':114' = 'd33' 
-- Equation name is 'd33', location is LC3_A16, type is buried.
d33      = DFFE( _EQ057, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ057 =  d33 &  _LC2_A16
         #  d3 &  _LC8_A16;

-- Node name is ':117' = 'd44' 
-- Equation name is 'd44', location is LC3_C2, type is buried.
d44      = DFFE( _EQ058, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ058 =  d4 &  _LC1_C2
         #  d44 &  _LC4_C2;

-- Node name is ':120' = 'd55' 
-- Equation name is 'd55', location is LC2_C2, type is buried.
d55      = DFFE( _EQ059, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ059 =  _LC7_C2
         # !d4 &  d5 &  _LC1_C2;

-- Node name is ':123' = 'd66' 
-- Equation name is 'd66', location is LC7_C8, type is buried.
d66      = DFFE( _EQ060, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ060 =  _LC5_C2
         #  d66 &  _LC8_C2
         #  d66 &  _LC4_D10;

-- Node name is ':102' = 'en_dw' 
-- Equation name is 'en_dw', location is LC5_A5, type is buried.
en_dw    = DFFE( _EQ061, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ061 =  _LC7_A5
         #  en_dw &  _LC7_C10
         #  en_dw & !_LC4_D10;

-- Node name is ':100' = 'en_up' 
-- Equation name is 'en_up', location is LC4_A2, type is buried.
en_up    = DFFE( _EQ062, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ062 =  _LC5_A2
         #  en_up &  updown
         #  en_up &  _LC7_C10;

-- Node name is '~100~1' = 'en_up~1' 
-- Equation name is '~100~1', location is LC3_E36, type is buried.
-- synthesized logic cell 
_LC3_E36 = LCELL( _EQ063);
  _EQ063 = !_LC2_A32 & !opendoor & !q20;

-- Node name is '~100~2' = 'en_up~2' 
-- Equation name is '~100~2', location is LC5_E36, type is buried.
-- synthesized logic cell 
_LC5_E36 = LCELL( _EQ064);
  _EQ064 =  _LC1_E34 &  _LC1_E36 & !_LC2_A32 & !_LC3_E34;

-- Node name is 'led_c_d0' 
-- Equation name is 'led_c_d0', type is output 
led_c_d0 =  _LC8_A27;

-- Node name is 'led_c_d1' 
-- Equation name is 'led_c_d1', type is output 
led_c_d1 =  _LC1_A30;

-- Node name is 'led_c_d2' 
-- Equation name is 'led_c_d2', type is output 
led_c_d2 =  _LC3_C7;

-- Node name is 'led_c_d3' 
-- Equation name is 'led_c_d3', type is output 
led_c_d3 =  _LC1_C9;

-- Node name is 'led_c_d4' 
-- Equation name is 'led_c_d4', type is output 
led_c_d4 =  _LC8_C6;

-- Node name is 'led_c_d5' 
-- Equation name is 'led_c_d5', type is output 
led_c_d5 =  _LC4_C8;

-- Node name is 'led_c_u0' 
-- Equation name is 'led_c_u0', type is output 
led_c_u0 =  _LC6_A15;

-- Node name is 'led_c_u1' 
-- Equation name is 'led_c_u1', type is output 
led_c_u1 =  _LC4_A30;

-- Node name is 'led_c_u2' 
-- Equation name is 'led_c_u2', type is output 
led_c_u2 =  _LC2_C7;

-- Node name is 'led_c_u3' 
-- Equation name is 'led_c_u3', type is output 
led_c_u3 =  _LC6_C9;

-- Node name is 'led_c_u4' 
-- Equation name is 'led_c_u4', type is output 
led_c_u4 =  _LC2_C6;

-- Node name is 'led_c_u5' 
-- Equation name is 'led_c_u5', type is output 
led_c_u5 =  _LC4_C15;

-- Node name is 'led_d0' 
-- Equation name is 'led_d0', type is output 
led_d0   =  _LC8_A2;

-- Node name is 'led_d1' 
-- Equation name is 'led_d1', type is output 
led_d1   =  _LC6_A30;

-- Node name is 'led_d2' 
-- Equation name is 'led_d2', type is output 
led_d2   =  _LC6_C7;

-- Node name is 'led_d3' 
-- Equation name is 'led_d3', type is output 
led_d3   =  _LC8_C9;

-- Node name is 'led_d4' 
-- Equation name is 'led_d4', type is output 
led_d4   =  _LC1_C6;

-- Node name is 'led_d5' 
-- Equation name is 'led_d5', type is output 
led_d5   =  _LC1_C8;

-- Node name is 'led0' 
-- Equation name is 'led0', type is output 
led0     =  _LC8_F3;

-- Node name is 'led1' 
-- Equation name is 'led1', type is output 
led1     =  _LC6_F3;

-- Node name is 'led2' 
-- Equation name is 'led2', type is output 
led2     =  _LC4_C10;

-- Node name is 'led3' 
-- Equation name is 'led3', type is output 
led3     =  _LC6_D17;

-- Node name is 'led4' 
-- Equation name is 'led4', type is output 
led4     =  _LC2_F3;

-- Node name is 'led5' 
-- Equation name is 'led5', type is output 
led5     =  _LC8_D17;

-- Node name is 'led6' 
-- Equation name is 'led6', type is output 
led6     =  _LC1_D17;

-- Node name is 'long' 
-- Equation name is 'long', type is output 
long     =  _LC2_E34;

-- Node name is ':99' = 'opendoor' 
-- Equation name is 'opendoor', location is LC1_A11, type is buried.
opendoor = DFFE( _EQ065, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ065 = !clr & !full &  _LC8_A11
         #  full &  opendoor
         #  clr &  opendoor;

-- Node name is ':98' = 'q' 
-- Equation name is 'q', location is LC7_A15, type is buried.
q        = DFFE( _EQ066, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ066 =  _LC3_C15 &  q;

-- Node name is ':94' = 'q10' 
-- Equation name is 'q10', location is LC1_A36, type is buried.
q10      = DFFE( _EQ067, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ067 =  _LC1_E34 & !_LC3_C15 &  _LC7_A36
         # !_LC3_C15 &  _LC8_A36;

-- Node name is ':93' = 'q11' 
-- Equation name is 'q11', location is LC5_A36, type is buried.
q11      = DFFE( _EQ068, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ068 =  _LC2_A15 &  _LC4_A36
         #  _LC1_E36 &  _LC2_A15 &  q11;

-- Node name is ':92' = 'q12' 
-- Equation name is 'q12', location is LC3_A26, type is buried.
q12      = DFFE( _EQ069, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ069 =  _LC2_A15 &  _LC8_A26
         #  _LC1_E36 &  _LC2_A15 &  q12;

-- Node name is ':97' = 'q20' 
-- Equation name is 'q20', location is LC2_E36, type is buried.
q20      = DFFE( _EQ070, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ070 = !clr &  _LC4_E34 &  q20