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📄 system.rpt

📁 一个使用VHDL语言设计的电梯控制程序
💻 RPT
📖 第 1 页 / 共 5 页
字号:
G2       : INPUT;
G3       : INPUT;
G4       : INPUT;
G5       : INPUT;
G6       : INPUT;
QUICK    : INPUT;

-- Node name is 'ALARM' 
-- Equation name is 'ALARM', type is output 
ALARM    =  _LC5_E26;

-- Node name is 'C_D2~1' 
-- Equation name is 'C_D2~1', location is LC4_E29, type is buried.
-- synthesized logic cell 
_LC4_E29 = LCELL( _EQ001);
  _EQ001 =  C_D2 & !_LC5_E15;

-- Node name is 'C_D2~2' 
-- Equation name is 'C_D2~2', location is LC2_E29, type is buried.
-- synthesized logic cell 
_LC2_E29 = LCELL( _EQ002);
  _EQ002 = !C_D2 & !C_D3 & !_LC5_E15;

-- Node name is 'C_D2~3' 
-- Equation name is 'C_D2~3', location is LC6_E10, type is buried.
-- synthesized logic cell 
_LC6_E10 = LCELL( _EQ003);
  _EQ003 = !C_D4 &  _LC2_E29;

-- Node name is 'C_D2~4' 
-- Equation name is 'C_D2~4', location is LC8_E10, type is buried.
-- synthesized logic cell 
_LC8_E10 = LCELL( _EQ004);
  _EQ004 = !C_D4 & !C_D5 &  C_D6 &  _LC2_E29;

-- Node name is 'CLR~1' 
-- Equation name is 'CLR~1', location is LC2_A19, type is buried.
-- synthesized logic cell 
_LC2_A19 = LCELL( _EQ005);
  _EQ005 = !FULL &  _LC3_E15;

-- Node name is 'CLR~2' 
-- Equation name is 'CLR~2', location is LC6_A27, type is buried.
-- synthesized logic cell 
_LC6_A27 = LCELL( _EQ006);
  _EQ006 =  _LC1_A25 &  _LC2_A36 &  _LC2_E23 & !QUICK;

-- Node name is 'CLR~3' 
-- Equation name is 'CLR~3', location is LC1_F31, type is buried.
-- synthesized logic cell 
_LC1_F31 = LCELL( _EQ007);
  _EQ007 =  _LC2_F25 &  _LC3_F25;

-- Node name is 'CLR~4' 
-- Equation name is 'CLR~4', location is LC6_F25, type is buried.
-- synthesized logic cell 
_LC6_F25 = LCELL( _EQ008);
  _EQ008 = !G1 & !G3 &  _LC3_E15 &  _LC3_F25;

-- Node name is 'CLR~5' 
-- Equation name is 'CLR~5', location is LC8_F25, type is buried.
-- synthesized logic cell 
_LC8_F25 = LCELL( _EQ009);
  _EQ009 = !G1 &  G2 &  _LC3_E15 & !_LC8_E26;

-- Node name is 'CLR~6' 
-- Equation name is 'CLR~6', location is LC1_C20, type is buried.
-- synthesized logic cell 
_LC1_C20 = LCELL( _EQ010);
  _EQ010 = !G2 & !G3 & !G4;

-- Node name is 'CLR~7' 
-- Equation name is 'CLR~7', location is LC4_C20, type is buried.
-- synthesized logic cell 
_LC4_C20 = LCELL( _EQ011);
  _EQ011 =  G6 & !_LC8_E26
         #  G5 & !_LC8_E26;

-- Node name is 'CLR~8' 
-- Equation name is 'CLR~8', location is LC7_A35, type is buried.
-- synthesized logic cell 
_LC7_A35 = LCELL( _EQ012);
  _EQ012 =  _LC2_A36 &  _LC2_E23 &  _LC8_A35 & !QUICK;

-- Node name is 'C_U1~1' 
-- Equation name is 'C_U1~1', location is LC5_E33, type is buried.
-- synthesized logic cell 
_LC5_E33 = LCELL( _EQ013);
  _EQ013 = !C_U1 &  C_U2 & !_LC5_E15;

-- Node name is 'C_U1~2' 
-- Equation name is 'C_U1~2', location is LC6_E22, type is buried.
-- synthesized logic cell 
_LC6_E22 = LCELL( _EQ014);
  _EQ014 = !C_U1 & !C_U2 & !_LC5_E15;

-- Node name is 'C_U1~3' 
-- Equation name is 'C_U1~3', location is LC7_E22, type is buried.
-- synthesized logic cell 
_LC7_E22 = LCELL( _EQ015);
  _EQ015 = !C_U1 & !C_U2 & !C_U3 & !_LC5_E15;

-- Node name is 'DENG~1' 
-- Equation name is 'DENG~1', location is LC1_A33, type is buried.
-- synthesized logic cell 
_LC1_A33 = LCELL( _EQ016);
  _EQ016 = !_LC1_E31 & !_LC2_A21 & !_LC8_A33;

-- Node name is 'DOOR0' 
-- Equation name is 'DOOR0', type is output 
DOOR0    =  _LC2_A25;

-- Node name is 'DOOR1' 
-- Equation name is 'DOOR1', type is output 
DOOR1    =  _LC1_A22;

-- Node name is 'DOWN' 
-- Equation name is 'DOWN', type is output 
DOWN     =  _LC5_A35;

-- Node name is 'D1~1' 
-- Equation name is 'D1~1', location is LC4_E33, type is buried.
-- synthesized logic cell 
_LC4_E33 = LCELL( _EQ017);
  _EQ017 = !D1 & !_LC5_E15;

-- Node name is 'D1~2' 
-- Equation name is 'D1~2', location is LC1_E29, type is buried.
-- synthesized logic cell 
_LC1_E29 = LCELL( _EQ018);
  _EQ018 = !D1 & !D2 &  D3 & !_LC5_E15;

-- Node name is 'D1~3' 
-- Equation name is 'D1~3', location is LC4_E17, type is buried.
-- synthesized logic cell 
_LC4_E17 = LCELL( _EQ019);
  _EQ019 = !D1 & !D2 & !D3 & !_LC5_E15;

-- Node name is 'D1~4' 
-- Equation name is 'D1~4', location is LC8_E17, type is buried.
-- synthesized logic cell 
_LC8_E17 = LCELL( _EQ020);
  _EQ020 = !D4 & !D5 &  D6 &  _LC4_E17;

-- Node name is 'G5~1' 
-- Equation name is 'G5~1', location is LC2_E5, type is buried.
-- synthesized logic cell 
_LC2_E5  = LCELL( _EQ021);
  _EQ021 =  _LC1_A27 & !_LC2_E17 & !_LC6_E5;

-- Node name is 'LED_C_D0' 
-- Equation name is 'LED_C_D0', type is output 
LED_C_D0 =  _LC1_E26;

-- Node name is 'LED_C_D1' 
-- Equation name is 'LED_C_D1', type is output 
LED_C_D1 =  _LC6_E32;

-- Node name is 'LED_C_D2' 
-- Equation name is 'LED_C_D2', type is output 
LED_C_D2 =  _LC6_E35;

-- Node name is 'LED_C_D3' 
-- Equation name is 'LED_C_D3', type is output 
LED_C_D3 =  _LC8_E8;

-- Node name is 'LED_C_D4' 
-- Equation name is 'LED_C_D4', type is output 
LED_C_D4 =  _LC4_E26;

-- Node name is 'LED_C_D5' 
-- Equation name is 'LED_C_D5', type is output 
LED_C_D5 =  _LC1_E16;

-- Node name is 'LED_C_U0' 
-- Equation name is 'LED_C_U0', type is output 
LED_C_U0 =  _LC6_E23;

-- Node name is 'LED_C_U1' 
-- Equation name is 'LED_C_U1', type is output 
LED_C_U1 =  _LC7_E32;

-- Node name is 'LED_C_U2' 
-- Equation name is 'LED_C_U2', type is output 
LED_C_U2 =  _LC1_E35;

-- Node name is 'LED_C_U3' 
-- Equation name is 'LED_C_U3', type is output 
LED_C_U3 =  _LC4_E8;

-- Node name is 'LED_C_U4' 
-- Equation name is 'LED_C_U4', type is output 
LED_C_U4 =  _LC1_E15;

-- Node name is 'LED_C_U5' 
-- Equation name is 'LED_C_U5', type is output 
LED_C_U5 =  _LC8_E16;

-- Node name is 'LED_D0' 
-- Equation name is 'LED_D0', type is output 
LED_D0   =  _LC4_E34;

-- Node name is 'LED_D1' 
-- Equation name is 'LED_D1', type is output 
LED_D1   =  _LC1_E32;

-- Node name is 'LED_D2' 
-- Equation name is 'LED_D2', type is output 
LED_D2   =  _LC2_E35;

-- Node name is 'LED_D3' 
-- Equation name is 'LED_D3', type is output 
LED_D3   =  _LC3_E8;

-- Node name is 'LED_D4' 
-- Equation name is 'LED_D4', type is output 
LED_D4   =  _LC4_E15;

-- Node name is 'LED_D5' 
-- Equation name is 'LED_D5', type is output 
LED_D5   =  _LC5_E16;

-- Node name is 'LED0' 
-- Equation name is 'LED0', type is output 
LED0     =  _LC5_F31;

-- Node name is 'LED1' 
-- Equation name is 'LED1', type is output 
LED1     =  _LC8_F31;

-- Node name is 'LED2' 
-- Equation name is 'LED2', type is output 
LED2     =  _LC7_F25;

-- Node name is 'LED3' 
-- Equation name is 'LED3', type is output 
LED3     =  _LC3_F31;

-- Node name is 'LED4' 
-- Equation name is 'LED4', type is output 
LED4     =  _LC1_F25;

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