lock_pin.ucf

YLP270开发板光盘附带的cpld逻辑试验

#PACE: Start of Constraints generated by PACE

#PACE: Start of PACE I/O Pin Assignments
NET "B_A16"  LOC = "P41"  ;
NET "B_nCS0"  LOC = "P43"  ;
NET "B_nCS1"  LOC = "P28"  ;
NET "B_nCS2"  LOC = "P29"  ;
NET "B_nCS3"  LOC = "P30"  ;
NET "B_nCS5"  LOC = "P32"  ;
NET "B_nOE"  LOC = "P36"  ;
NET "B_nPCE1"  LOC = "P27"  ;
NET "B_nPCE2"  LOC = "P31"  ;
NET "B_nPIOR"  LOC = "P23"  ;
NET "B_nPIOW"  LOC = "P44"  ;
NET "B_nPOE"  LOC = "P22"  ;
NET "B_nPREG"  LOC = "P1"  ;
NET "B_nPWE"  LOC = "P33"  ;
NET "B_nRESET"  LOC = "P38"  ;
NET "B_nWE"  LOC = "P34"  ;
NET "BUF_DIR"  LOC = "P42"  ;
NET "BUF_EN"  LOC = "P37"  ;
NET "CF_IORDY"  LOC = "P3"  ;
NET "CF_nCS0"  LOC = "P7" | SLEW = SLOW ;
NET "CF_nCS1"  LOC = "P8" | SLEW = SLOW ;
NET "CF_nOE"  LOC = "P5"  ;
NET "CF_nWE"  LOC = "P6"  ;
NET "IDE_DIOR"  LOC = "P13"  ;
NET "IDE_DIOW"  LOC = "P12"  ;
NET "IDE_IORDY"  LOC = "P2"  ;
NET "nPWAIT"  LOC = "P39"  ;
NET "nWAIT"  LOC = "P40"  ;
NET "USR_DEF<0>"  LOC = "P14" | SLEW = SLOW ;
NET "USR_DEF<1>"  LOC = "P16" | SLEW = SLOW ;
NET "USR_DEF<2>"  LOC = "P18" | SLEW = SLOW ;
NET "USR_DEF<3>"  LOC = "P19" | SLEW = SLOW ;
NET "USR_DEF<4>"  LOC = "P20" | SLEW = SLOW ;
NET "USR_DEF<5>"  LOC = "P21" | SLEW = SLOW ;

#PACE: Start of PACE Area Constraints

#PACE: Start of PACE Prohibit Constraints

#PACE: End of Constraints generated by PACE