yle270_dev.mfd

YLP270开发板光盘附带的cpld逻辑试验

MDF Database:  version 1.0
MDF_INFO | yle270_dev | XC9536XL-10-VQ44
MACROCELL | 1 | 3 | BUF_EN_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 4 | B_nCS5  | B_nCS3  | B_nCS2  | B_nCS1
INPUTP | 4 | 46 | 44 | 43 | 42
EQ | 1 | 
   BUF_EN = B_nCS5 & B_nCS3 & B_nCS2 & B_nCS1;

MACROCELL | 0 | 3 | BUF_DIR_OBUF$BUF0
ATTRIBUTES | 264962 | 0
INPUTS | 1 | B_nOE
INPUTP | 1 | 3
EQ | 1 | 
   BUF_DIR = B_nOE;

MACROCELL | 0 | 10 | CF_nCS0_OBUF
ATTRIBUTES | 264960 | 0
INPUTS | 2 | B_nCS3  | B_A16
INPUTP | 2 | 44 | 8
EQ | 1 | 
   !CF_nCS0 = !B_nCS3 & B_A16;

MACROCELL | 0 | 11 | CF_nCS1_OBUF
ATTRIBUTES | 264960 | 0
INPUTS | 2 | B_nCS3  | B_A16
INPUTP | 2 | 44 | 8
EQ | 1 | 
   !CF_nCS1 = !B_nCS3 & !B_A16;

MACROCELL | 0 | 8 | CF_nOE_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 2 | B_nCS3  | B_nOE
INPUTP | 2 | 44 | 3
EQ | 1 | 
   !CF_nOE = !B_nCS3 & !B_nOE;

MACROCELL | 0 | 9 | CF_nWE_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 2 | B_nCS3  | B_nWE
INPUTP | 2 | 44 | 1
EQ | 1 | 
   !CF_nWE = !B_nCS3 & !B_nWE;

MACROCELL | 0 | 13 | IDE_DIOR_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 2 | B_nCS1  | B_nOE
INPUTP | 2 | 42 | 3
EQ | 1 | 
   !IDE_DIOR = !B_nCS1 & !B_nOE;

MACROCELL | 0 | 12 | IDE_DIOW_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 2 | B_nCS1  | B_nWE
INPUTP | 2 | 42 | 1
EQ | 1 | 
   !IDE_DIOW = !B_nCS1 & !B_nWE;

MACROCELL | 1 | 14 | USR_DEF_5_OBUF
ATTRIBUTES | 264960 | 0
INPUTS | 11 | B_nPWE  | B_nPREG  | B_nPOE  | B_nPIOW  | B_nPIOR  | B_nPCE2  | B_nPCE1  | B_nCS0  | IDE_IORDY  | CF_IORDY  | B_nRESET
INPUTP | 11 | 47 | 12 | 35 | 11 | 37 | 45 | 41 | 10 | 13 | 14 | 5
EQ | 3 | 
   !USR_DEF<5> = !B_nPWE & !B_nPREG & !B_nPOE & !B_nPIOW & !B_nPIOR & 
	!B_nPCE2 & !B_nPCE1 & !B_nCS0 & !IDE_IORDY & !CF_IORDY & 
	!B_nRESET;

MACROCELL | 0 | 0 | USR_DEF_0_OBUF
ATTRIBUTES | 265986 | 0
INPUTS | 0
EQ | 2 | 
   nWAIT = Gnd;
   nWAIT.OE = Gnd;

MACROCELL | 1 | 0 | USR_DEF_0_OBUF$BUF0
ATTRIBUTES | 265986 | 0
INPUTS | 0
EQ | 2 | 
   nPWAIT = Gnd;
   nPWAIT.OE = Gnd;

MACROCELL | 0 | 15 | USR_DEF_0_OBUF$BUF1
ATTRIBUTES | 264960 | 0
INPUTS | 0
EQ | 1 | 
   USR_DEF<1> = Gnd;

MACROCELL | 0 | 14 | USR_DEF_0_OBUF$BUF2
ATTRIBUTES | 264960 | 0
INPUTS | 0
EQ | 1 | 
   USR_DEF<0> = Gnd;

MACROCELL | 1 | 15 | USR_DEF_2_OBUF
ATTRIBUTES | 264960 | 0
INPUTS | 0
EQ | 1 | 
   USR_DEF<4> = Vcc;

MACROCELL | 1 | 16 | USR_DEF_2_OBUF$BUF0
ATTRIBUTES | 264960 | 0
INPUTS | 0
EQ | 1 | 
   USR_DEF<3> = Vcc;

MACROCELL | 0 | 16 | USR_DEF_2_OBUF$BUF1
ATTRIBUTES | 264960 | 0
INPUTS | 0
EQ | 1 | 
   USR_DEF<2> = Vcc;

PIN | B_nPWE | 64 | 0 | N/A | 47 | 1 | 1 | 14
PIN | B_nPREG | 64 | 0 | N/A | 12 | 1 | 1 | 14
PIN | B_nPOE | 64 | 0 | N/A | 35 | 1 | 1 | 14
PIN | B_nPIOW | 64 | 0 | N/A | 11 | 1 | 1 | 14
PIN | B_nPIOR | 64 | 0 | N/A | 37 | 1 | 1 | 14
PIN | B_nPCE2 | 64 | 0 | N/A | 45 | 1 | 1 | 14
PIN | B_nPCE1 | 64 | 0 | N/A | 41 | 1 | 1 | 14
PIN | B_nCS0 | 64 | 0 | N/A | 10 | 1 | 1 | 14
PIN | B_nCS5 | 64 | 0 | N/A | 46 | 1 | 1 | 3
PIN | B_nCS3 | 64 | 0 | N/A | 44 | 5 | 1 | 3 | 0 | 10 | 0 | 11 | 0 | 8 | 0 | 9
PIN | B_nCS2 | 64 | 0 | N/A | 43 | 1 | 1 | 3
PIN | B_nCS1 | 64 | 0 | N/A | 42 | 3 | 1 | 3 | 0 | 13 | 0 | 12
PIN | IDE_IORDY | 64 | 0 | N/A | 13 | 1 | 1 | 14
PIN | CF_IORDY | 64 | 0 | N/A | 14 | 1 | 1 | 14
PIN | B_nRESET | 64 | 0 | N/A | 5 | 1 | 1 | 14
PIN | B_nOE | 64 | 0 | N/A | 3 | 3 | 0 | 3 | 0 | 8 | 0 | 13
PIN | B_A16 | 64 | 0 | N/A | 8 | 2 | 0 | 10 | 0 | 11
PIN | B_nWE | 64 | 0 | N/A | 1 | 2 | 0 | 9 | 0 | 12
PIN | BUF_EN | 536871040 | 0 | N/A | 4
PIN | BUF_DIR | 536871040 | 0 | N/A | 9
PIN | CF_nCS0 | 128 | 0 | N/A | 18
PIN | CF_nCS1 | 128 | 0 | N/A | 19
PIN | CF_nOE | 536871040 | 0 | N/A | 16
PIN | CF_nWE | 536871040 | 0 | N/A | 17
PIN | IDE_DIOR | 536871040 | 0 | N/A | 24
PIN | IDE_DIOW | 536871040 | 0 | N/A | 23
PIN | USR_DEF<5> | 128 | 0 | N/A | 34
PIN | nWAIT | 536871040 | 0 | N/A | 7
PIN | nPWAIT | 536871040 | 0 | N/A | 6
PIN | USR_DEF<1> | 128 | 0 | N/A | 27
PIN | USR_DEF<0> | 128 | 0 | N/A | 25
PIN | USR_DEF<4> | 128 | 0 | N/A | 33
PIN | USR_DEF<3> | 128 | 0 | N/A | 32
PIN | USR_DEF<2> | 128 | 0 | N/A | 31