yle270_dev.pnx

YLP270开发板光盘附带的cpld逻辑试验

<?xml version='1.0' encoding='utf-8' ?>
<!DOCTYPE ibis [
<!ELEMENT ibis (part, pin+)>
<!ELEMENT part EMPTY>
<!ELEMENT pin EMPTY>
<!ATTLIST part
  arch   CDATA #REQUIRED
  device CDATA #REQUIRED
  spg    CDATA #REQUIRED
  pkg    CDATA #REQUIRED>
<!ATTLIST pin
  nm     CDATA #REQUIRED
  no     CDATA #REQUIRED
  iostd  (TTL|LVTTL|LVCMOS2|NA) "NA"
  sr     (SLOW|FAST|slow|fast) "SLOW"
  dir    (BIDIR|bidir|INPUT|input|OUTPUT|output) "BIDIR">
]>
<ibis><part pkg="VQ44" spg="-10" arch="xc9500xl" device="XC9536XL"/><pin nm="B_nPWE" no="33" dir="input"/><pin nm="B_nPREG" no="1" dir="input"/><pin nm="B_nPOE" no="22" dir="input"/><pin nm="B_nPIOW" no="44" dir="input"/><pin nm="B_nPIOR" no="23" dir="input"/><pin nm="B_nPCE2" no="31" dir="input"/><pin nm="B_nPCE1" no="27" dir="input"/><pin nm="B_nCS0" no="43" dir="input"/><pin nm="B_nCS5" no="32" dir="input"/><pin nm="B_nCS3" no="30" dir="input"/><pin nm="B_nCS2" no="29" dir="input"/><pin nm="B_nCS1" no="28" dir="input"/><pin nm="IDE_IORDY" no="2" dir="input"/><pin nm="CF_IORDY" no="3" dir="input"/><pin nm="B_nRESET" no="38" dir="input"/><pin nm="B_nOE" no="36" dir="input"/><pin nm="B_A16" no="41" dir="input"/><pin nm="B_nWE" no="34" dir="input"/><pin nm="BUF_EN" no="37" sr="fast" dir="output"/><pin nm="BUF_DIR" no="42" sr="fast" dir="output"/><pin nm="CF_nCS0" no="7" sr="slow" dir="output"/><pin nm="CF_nCS1" no="8" sr="slow" dir="output"/><pin nm="CF_nOE" no="5" sr="fast" dir="output"/><pin nm="CF_nWE" no="6" sr="fast" dir="output"/><pin nm="IDE_DIOR" no="13" sr="fast" dir="output"/><pin nm="IDE_DIOW" no="12" sr="fast" dir="output"/><pin nm="USR_DEF&lt;5&gt;" no="21" sr="slow" dir="output"/><pin nm="nWAIT" no="40" sr="fast" dir="output"/><pin nm="nPWAIT" no="39" sr="fast" dir="output"/><pin nm="USR_DEF&lt;1&gt;" no="16" sr="slow" dir="output"/><pin nm="USR_DEF&lt;0&gt;" no="14" sr="slow" dir="output"/><pin nm="USR_DEF&lt;4&gt;" no="20" sr="slow" dir="output"/><pin nm="USR_DEF&lt;3&gt;" no="19" sr="slow" dir="output"/><pin nm="USR_DEF&lt;2&gt;" no="18" sr="slow" dir="output"/></ibis>