xc.rpt

基于CPLD XC95018开发的一段VHDL代码

p0d<2>               .....X.X.X....X....X....X..X............ 7       7
p0d<1>               .....X.X.X...X....X....X...X............ 7       7
p0d<0>               .....X.X.X..X....X....X....X............ 7       7
kwrdatdo<2>          ..XXX...................X.X............. 5       5
kwrdatdl<5>          X..XX................X....X............. 5       5
doe                  .........X...................X.......... 2       2
kwrdatdl<2>          ..XXX..............X......X............. 5       5
die                  .........X.................X............ 2       2
kie                  ......X.X.X.................X........... 4       4
kwrdatdh<5>          X..XX...........X.........X............. 5       5
lcdcs                ......X.X.X.................X.X......... 5       5
koe                  ......X.X.X...................X......... 4       4
kwrdatdh<3>          .X.XX..........X..........X............. 5       5
kint                 ...........X............................ 1       1
kwrdatdh<2>          ..XXX.........X...........X............. 5       5
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*******************************  Equations  ********************************

********** Mapped Logic **********

FDCPE_awrdath0: FDCPE port map (awrdath(0),awrdath_D(0),NOT intk_OBUF/intk_OBUF_CLKF__$INT,'0','0');
awrdath_D(0) <= ((p0a(0).PIN AND a14a)
	OR (NOT a14a AND awrdath(0).LFBK));

FDCPE_awrdath1: FDCPE port map (awrdath(1),awrdath_D(1),NOT intk_OBUF/intk_OBUF_CLKF__$INT,'0','0');
awrdath_D(1) <= ((a14a AND p0a(1).PIN)
	OR (NOT a14a AND awrdath(1).LFBK));

FDCPE_awrdath2: FDCPE port map (awrdath(2),awrdath_D(2),NOT intk_OBUF/intk_OBUF_CLKF__$INT,'0','0');
awrdath_D(2) <= ((a14a AND p0a(2).PIN)
	OR (NOT a14a AND awrdath(2).LFBK));

FDCPE_awrdath3: FDCPE port map (awrdath(3),awrdath_D(3),NOT intk_OBUF/intk_OBUF_CLKF__$INT,'0','0');
awrdath_D(3) <= ((a14a AND p0a(3).PIN)
	OR (NOT a14a AND awrdath(3).LFBK));

FDCPE_awrdath4: FDCPE port map (awrdath(4),awrdath_D(4),NOT intk_OBUF/intk_OBUF_CLKF__$INT,'0','0');
awrdath_D(4) <= ((a14a AND p0a(4).PIN)
	OR (NOT a14a AND awrdath(4).LFBK));

FDCPE_awrdath5: FDCPE port map (awrdath(5),awrdath_D(5),NOT intk_OBUF/intk_OBUF_CLKF__$INT,'0','0');
awrdath_D(5) <= ((a14a AND p0a(5).PIN)
	OR (NOT a14a AND awrdath(5).LFBK));

FDCPE_awrdath6: FDCPE port map (awrdath(6),awrdath_D(6),NOT intk_OBUF/intk_OBUF_CLKF__$INT,'0','0');
awrdath_D(6) <= ((a14a AND p0a(6).PIN)
	OR (NOT a14a AND awrdath(6).LFBK));

FDCPE_awrdath7: FDCPE port map (awrdath(7),awrdath_D(7),NOT intk_OBUF/intk_OBUF_CLKF__$INT,'0','0');
awrdath_D(7) <= ((a14a AND p0a(7).PIN)
	OR (NOT a14a AND awrdath(7).LFBK));

FDCPE_awrdatl0: FDCPE port map (awrdatl(0),awrdatl_D(0),NOT intk_OBUF/intk_OBUF_CLKF__$INT,'0','0');
awrdatl_D(0) <= ((p0a(0).PIN AND NOT a14a)
	OR (a14a AND awrdatl(0).LFBK));

FDCPE_awrdatl1: FDCPE port map (awrdatl(1),awrdatl_D(1),NOT intk_OBUF/intk_OBUF_CLKF__$INT,'0','0');
awrdatl_D(1) <= ((a14a AND awrdatl(1).LFBK)
	OR (NOT a14a AND p0a(1).PIN));

FDCPE_awrdatl2: FDCPE port map (awrdatl(2),awrdatl_D(2),NOT intk_OBUF/intk_OBUF_CLKF__$INT,'0','0');
awrdatl_D(2) <= ((a14a AND awrdatl(2).LFBK)
	OR (NOT a14a AND p0a(2).PIN));

FDCPE_awrdatl3: FDCPE port map (awrdatl(3),awrdatl_D(3),NOT intk_OBUF/intk_OBUF_CLKF__$INT,'0','0');
awrdatl_D(3) <= ((a14a AND awrdatl(3).LFBK)
	OR (NOT a14a AND p0a(3).PIN));

FDCPE_awrdatl4: FDCPE port map (awrdatl(4),awrdatl_D(4),NOT intk_OBUF/intk_OBUF_CLKF__$INT,'0','0');
awrdatl_D(4) <= ((a14a AND awrdatl(4).LFBK)
	OR (NOT a14a AND p0a(4).PIN));

FDCPE_awrdatl5: FDCPE port map (awrdatl(5),awrdatl_D(5),NOT intk_OBUF/intk_OBUF_CLKF__$INT,'0','0');
awrdatl_D(5) <= ((a14a AND awrdatl(5).LFBK)
	OR (NOT a14a AND p0a(5).PIN));

FDCPE_awrdatl6: FDCPE port map (awrdatl(6),awrdatl_D(6),NOT intk_OBUF/intk_OBUF_CLKF__$INT,'0','0');
awrdatl_D(6) <= ((a14a AND awrdatl(6).LFBK)
	OR (NOT a14a AND p0a(6).PIN));

FDCPE_awrdatl7: FDCPE port map (awrdatl(7),awrdatl_D(7),NOT intk_OBUF/intk_OBUF_CLKF__$INT,'0','0');
awrdatl_D(7) <= ((a14a AND awrdatl(7).LFBK)
	OR (NOT a14a AND p0a(7).PIN));


die <= NOT ((NOT a15d AND NOT rdd));


doe <= NOT ((NOT wrd AND NOT a15d));

FDCPE_dwrdat0: FDCPE port map (dwrdat(0),p0d(0).PIN,NOT dwrdat(7)/dwrdat(7)_CLKF__$INT,'0','0');

FDCPE_dwrdat1: FDCPE port map (dwrdat(1),p0d(1).PIN,NOT dwrdat(7)/dwrdat(7)_CLKF__$INT,'0','0');

FDCPE_dwrdat2: FDCPE port map (dwrdat(2),p0d(2).PIN,NOT dwrdat(7)/dwrdat(7)_CLKF__$INT,'0','0');

FDCPE_dwrdat3: FDCPE port map (dwrdat(3),p0d(3).PIN,NOT dwrdat(7)/dwrdat(7)_CLKF__$INT,'0','0');

FDCPE_dwrdat4: FDCPE port map (dwrdat(4),p0d(4).PIN,NOT dwrdat(7)/dwrdat(7)_CLKF__$INT,'0','0');

FDCPE_dwrdat5: FDCPE port map (dwrdat(5),p0d(5).PIN,NOT dwrdat(7)/dwrdat(7)_CLKF__$INT,'0','0');

FDCPE_dwrdat6: FDCPE port map (dwrdat(6),p0d(6).PIN,NOT dwrdat(7)/dwrdat(7)_CLKF__$INT,'0','0');

FDCPE_dwrdat7: FDCPE port map (dwrdat(7),p0d(7).PIN,NOT dwrdat(7)/dwrdat(7)_CLKF__$INT,'0','0');


dwrdat(7)/dwrdat(7)_CLKF__$INT <= (NOT wrd AND a15d);

FDCPE_intd: FDCPE port map (intd,intd_D,NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
intd_D <= ((a12k AND a11k)
	OR (NOT a12k AND intd_OBUF.LFBK));

FDCPE_intk: FDCPE port map (intk,a14a,NOT intk_OBUF/intk_OBUF_CLKF__$INT,'0','0');


intk_OBUF/intk_OBUF_CLKF__$INT <= (NOT wra AND a15a);


kie <= NOT ((NOT rdk AND a15k AND NOT a14k AND NOT a13k));


kint <= ckey;


koe <= NOT ((NOT wrk AND a15k AND NOT a14k AND NOT a13k));

FTCPE_kwrdatdh0: FTCPE port map (kwrdatdh(0),kwrdatdh_T(0),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
kwrdatdh_T(0) <= ((a12k AND a11k AND p0k(0).PIN AND NOT kwrdatdh(0).LFBK)
	OR (a12k AND a11k AND NOT p0k(0).PIN AND kwrdatdh(0).LFBK));

FTCPE_kwrdatdh1: FTCPE port map (kwrdatdh(1),kwrdatdh_T(1),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
kwrdatdh_T(1) <= ((a12k AND a11k AND p0k(1).PIN AND NOT kwrdatdh(1).LFBK)
	OR (a12k AND a11k AND NOT p0k(1).PIN AND kwrdatdh(1).LFBK));

FTCPE_kwrdatdh2: FTCPE port map (kwrdatdh(2),kwrdatdh_T(2),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
kwrdatdh_T(2) <= ((a12k AND a11k AND p0k(2).PIN AND NOT kwrdatdh(2).LFBK)
	OR (a12k AND a11k AND NOT p0k(2).PIN AND kwrdatdh(2).LFBK));

FTCPE_kwrdatdh3: FTCPE port map (kwrdatdh(3),kwrdatdh_T(3),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
kwrdatdh_T(3) <= ((a12k AND a11k AND p0k(3).PIN AND NOT kwrdatdh(3).LFBK)
	OR (a12k AND a11k AND NOT p0k(3).PIN AND kwrdatdh(3).LFBK));

FTCPE_kwrdatdh4: FTCPE port map (kwrdatdh(4),kwrdatdh_T(4),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
kwrdatdh_T(4) <= ((a12k AND a11k AND p0k(4).PIN AND NOT kwrdatdh(4).LFBK)
	OR (a12k AND a11k AND NOT p0k(4).PIN AND kwrdatdh(4).LFBK));

FTCPE_kwrdatdh5: FTCPE port map (kwrdatdh(5),kwrdatdh_T(5),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
kwrdatdh_T(5) <= ((a12k AND a11k AND p0k(5).PIN AND NOT kwrdatdh(5).LFBK)
	OR (a12k AND a11k AND NOT p0k(5).PIN AND kwrdatdh(5).LFBK));

FTCPE_kwrdatdh6: FTCPE port map (kwrdatdh(6),kwrdatdh_T(6),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
kwrdatdh_T(6) <= ((a12k AND a11k AND p0k(6).PIN AND NOT kwrdatdh(6).LFBK)
	OR (a12k AND a11k AND NOT p0k(6).PIN AND kwrdatdh(6).LFBK));

FTCPE_kwrdatdh7: FTCPE port map (kwrdatdh(7),kwrdatdh_T(7),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
kwrdatdh_T(7) <= ((a12k AND a11k AND p0k(7).PIN AND NOT kwrdatdh(7).LFBK)
	OR (a12k AND a11k AND NOT p0k(7).PIN AND kwrdatdh(7).LFBK));

FTCPE_kwrdatdl0: FTCPE port map (kwrdatdl(0),kwrdatdl_T(0),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
kwrdatdl_T(0) <= ((a12k AND NOT a11k AND p0k(0).PIN AND NOT kwrdatdl(0).LFBK)
	OR (a12k AND NOT a11k AND NOT p0k(0).PIN AND kwrdatdl(0).LFBK));

FTCPE_kwrdatdl1: FTCPE port map (kwrdatdl(1),kwrdatdl_T(1),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
kwrdatdl_T(1) <= ((a12k AND NOT a11k AND p0k(1).PIN AND NOT kwrdatdl(1).LFBK)
	OR (a12k AND NOT a11k AND NOT p0k(1).PIN AND kwrdatdl(1).LFBK));

FTCPE_kwrdatdl2: FTCPE port map (kwrdatdl(2),kwrdatdl_T(2),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
kwrdatdl_T(2) <= ((a12k AND NOT a11k AND p0k(2).PIN AND NOT kwrdatdl(2).LFBK)
	OR (a12k AND NOT a11k AND NOT p0k(2).PIN AND kwrdatdl(2).LFBK));

FTCPE_kwrdatdl3: FTCPE port map (kwrdatdl(3),kwrdatdl_T(3),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
kwrdatdl_T(3) <= ((a12k AND NOT a11k AND p0k(3).PIN AND NOT kwrdatdl(3).LFBK)
	OR (a12k AND NOT a11k AND NOT p0k(3).PIN AND kwrdatdl(3).LFBK));

FTCPE_kwrdatdl4: FTCPE port map (kwrdatdl(4),kwrdatdl_T(4),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
kwrdatdl_T(4) <= ((a12k AND NOT a11k AND p0k(4).PIN AND NOT kwrdatdl(4).LFBK)
	OR (a12k AND NOT a11k AND NOT p0k(4).PIN AND kwrdatdl(4).LFBK));

FTCPE_kwrdatdl5: FTCPE port map (kwrdatdl(5),kwrdatdl_T(5),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
kwrdatdl_T(5) <= ((a12k AND NOT a11k AND p0k(5).PIN AND NOT kwrdatdl(5).LFBK)
	OR (a12k AND NOT a11k AND NOT p0k(5).PIN AND kwrdatdl(5).LFBK));

FTCPE_kwrdatdl6: FTCPE port map (kwrdatdl(6),kwrdatdl_T(6),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
kwrdatdl_T(6) <= ((a12k AND NOT a11k AND p0k(6).PIN AND NOT kwrdatdl(6).LFBK)
	OR (a12k AND NOT a11k AND NOT p0k(6).PIN AND kwrdatdl(6).LFBK));

FTCPE_kwrdatdl7: FTCPE port map (kwrdatdl(7),kwrdatdl_T(7),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
kwrdatdl_T(7) <= ((a12k AND NOT a11k AND p0k(7).PIN AND NOT kwrdatdl(7).LFBK)
	OR (a12k AND NOT a11k AND NOT p0k(7).PIN AND kwrdatdl(7).LFBK));

FTCPE_kwrdatdo0: FTCPE port map (kwrdatdo(0),kwrdatdo_T(0),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
kwrdatdo_T(0) <= ((NOT a12k AND a11k AND p0k(0).PIN AND NOT kwrdatdo(0).LFBK)
	OR (NOT a12k AND a11k AND NOT p0k(0).PIN AND kwrdatdo(0).LFBK));

FTCPE_kwrdatdo1: FTCPE port map (kwrdatdo(1),kwrdatdo_T(1),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
kwrdatdo_T(1) <= ((NOT a12k AND a11k AND p0k(1).PIN AND NOT kwrdatdo(1).LFBK)
	OR (NOT a12k AND a11k AND NOT p0k(1).PIN AND kwrdatdo(1).LFBK));

FTCPE_kwrdatdo2: FTCPE port map (kwrdatdo(2),kwrdatdo_T(2),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
kwrdatdo_T(2) <= ((NOT a12k AND a11k AND p0k(2).PIN AND NOT kwrdatdo(2).LFBK)
	OR (NOT a12k AND a11k AND NOT p0k(2).PIN AND kwrdatdo(2).LFBK));

FTCPE_kwrdatdo3: FTCPE port map (kwrdatdo(3),kwrdatdo_T(3),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
kwrdatdo_T(3) <= ((NOT a12k AND a11k AND p0k(3).PIN AND NOT kwrdatdo(3).LFBK)
	OR (NOT a12k AND a11k AND NOT p0k(3).PIN AND kwrdatdo(3).LFBK));

FTCPE_kwrdatdo4: FTCPE port map (kwrdatdo(4),kwrdatdo_T(4),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
kwrdatdo_T(4) <= ((NOT a12k AND a11k AND p0k(4).PIN AND NOT kwrdatdo(4).LFBK)
	OR (NOT a12k AND a11k AND NOT p0k(4).PIN AND kwrdatdo(4).LFBK));

FTCPE_kwrdatdo5: FTCPE port map (kwrdatdo(5),kwrdatdo_T(5),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
kwrdatdo_T(5) <= ((NOT a12k AND a11k AND p0k(5).PIN AND NOT kwrdatdo(5).LFBK)
	OR (NOT a12k AND a11k AND NOT p0k(5).PIN AND kwrdatdo(5).LFBK));

FTCPE_kwrdatdo6: FTCPE port map (kwrdatdo(6),kwrdatdo_T(6),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
kwrdatdo_T(6) <= ((NOT a12k AND a11k AND p0k(6).PIN AND NOT kwrdatdo(6).LFBK)
	OR (NOT a12k AND a11k AND NOT p0k(6).PIN AND kwrdatdo(6).LFBK));

FTCPE_kwrdatdo7: FTCPE port map (kwrdatdo(7),kwrdatdo_T(7),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
kwrdatdo_T(7) <= ((NOT a12k AND a11k AND p0k(7).PIN AND NOT kwrdatdo(7).LFBK)
	OR (NOT a12k AND a11k AND NOT p0k(7).PIN AND kwrdatdo(7).LFBK));


kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT <= (NOT wrk AND a15k AND a14k);


lcdcs <= ((NOT wrk AND a15k AND NOT a14k AND a13k)
	OR (NOT rdk AND a15k AND NOT a14k AND a13k));

FTCPE_p0a0: FTCPE port map (p0a_I(0),p0a_T(0),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
p0a_T(0) <= ((NOT a12k AND NOT a11k AND p0k(0).PIN AND NOT kwrdata(0).LFBK)
	OR (NOT a12k AND NOT a11k AND NOT p0k(0).PIN AND kwrdata(0).LFBK));
p0a(0) <= p0a_I(0) when p0a_OE(0) = '1' else 'Z';
p0a_OE(0) <= (a15a AND NOT rda);

FTCPE_p0a1: FTCPE port map (p0a_I(1),p0a_T(1),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
p0a_T(1) <= ((NOT a12k AND NOT a11k AND p0k(1).PIN AND NOT kwrdata(1).LFBK)
	OR (NOT a12k AND NOT a11k AND NOT p0k(1).PIN AND kwrdata(1).LFBK));
p0a(1) <= p0a_I(1) when p0a_OE(1) = '1' else 'Z';
p0a_OE(1) <= (a15a AND NOT rda);

FTCPE_p0a2: FTCPE port map (p0a_I(2),p0a_T(2),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
p0a_T(2) <= ((NOT a12k AND NOT a11k AND p0k(2).PIN AND NOT kwrdata(2).LFBK)
	OR (NOT a12k AND NOT a11k AND NOT p0k(2).PIN AND kwrdata(2).LFBK));
p0a(2) <= p0a_I(2) when p0a_OE(2) = '1' else 'Z';
p0a_OE(2) <= (a15a AND NOT rda);

FTCPE_p0a3: FTCPE port map (p0a_I(3),p0a_T(3),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');
p0a_T(3) <= ((NOT a12k AND NOT a11k AND p0k(3).PIN AND NOT kwrdata(3).LFBK)
	OR (NOT a12k AND NOT a11k AND NOT p0k(3).PIN AND kwrdata(3).LFBK));
p0a(3) <= p0a_I(3) when p0a_OE(3) = '1' else 'Z';
p0a_OE(3) <= (a15a AND NOT rda);

FTCPE_p0a4: FTCPE port map (p0a_I(4),p0a_T(4),NOT kwrdatdo(7)/kwrdatdo(7)_CLKF__$INT,'0','0');